From owner-freebsd-isdn Sat Feb 28 14:21:28 1998 Return-Path: Received: (from majordom@localhost) by hub.freebsd.org (8.8.8/8.8.8) id OAA26371 for freebsd-isdn-outgoing; Sat, 28 Feb 1998 14:21:28 -0800 (PST) (envelope-from owner-freebsd-isdn@FreeBSD.ORG) Received: from whistle.com (s205m131.whistle.com [207.76.205.131]) by hub.freebsd.org (8.8.8/8.8.8) with ESMTP id OAA26366 for ; Sat, 28 Feb 1998 14:21:27 -0800 (PST) (envelope-from archie@whistle.com) Received: (from smap@localhost) by whistle.com (8.7.5/8.6.12) id OAA04528; Sat, 28 Feb 1998 14:20:56 -0800 (PST) Received: from bubba.whistle.com(207.76.205.7) by whistle.com via smap (V1.3) id sma004526; Sat Feb 28 14:20:48 1998 Received: (from archie@localhost) by bubba.whistle.com (8.8.7/8.6.12) id OAA08206; Sat, 28 Feb 1998 14:20:48 -0800 (PST) From: Archie Cobbs Message-Id: <199802282220.OAA08206@bubba.whistle.com> Subject: Re: AVM A1 Setup bug on NetBSD? In-Reply-To: <199802281511.QAA00257@rvc1.informatik.ba-stuttgart.de> from Wolfgang Helbig at "Feb 28, 98 04:11:25 pm" To: helbig@Informatik.BA-Stuttgart.DE (Wolfgang Helbig) Date: Sat, 28 Feb 1998 14:20:48 -0800 (PST) Cc: freebsd-isdn@FreeBSD.ORG X-Mailer: ELM [version 2.4ME+ PL31 (25)] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-freebsd-isdn@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org Wolfgang Helbig writes: > > > Feb 27 00:00:07 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request > > > Feb 27 00:00:08 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3 > > > Feb 27 00:00:08 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request > > > Feb 27 00:00:09 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3 > > > Feb 27 00:00:09 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request > > > Feb 27 00:00:10 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3 > > > > Yes - this is very much likeley due to the interrupt handler not > > being called. > > The same happened on a FreeBSD SMP system. The workaround was > to MASK/UNMASK the ISAC/HSCX interrupts every time an ISAC command > is issued (see layer1/i4b_isac.c) Sounds like a case of the chip generating a level-sensitive interrupt and the board needing an edge. If a new interrupt becomes pending while you're in your interrupt routine, but before you've cleared the old interrupt condition, you must generate a new edge by masking and then unmasking all interrupts. Just a guess.. -Archie ___________________________________________________________________________ Archie Cobbs * Whistle Communications, Inc. * http://www.whistle.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-isdn" in the body of the message