From owner-cvs-all Thu Nov 7 8: 9:44 2002 Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7ED8437B401; Thu, 7 Nov 2002 08:09:43 -0800 (PST) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 3600143E4A; Thu, 7 Nov 2002 08:09:43 -0800 (PST) (envelope-from tmm@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id gA7G7kmV023425; Thu, 7 Nov 2002 08:07:46 -0800 (PST) (envelope-from tmm@repoman.freebsd.org) Received: (from tmm@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id gA7G7kXF023424; Thu, 7 Nov 2002 08:07:46 -0800 (PST) Message-Id: <200211071607.gA7G7kXF023424@repoman.freebsd.org> From: Thomas Moestl Date: Thu, 7 Nov 2002 08:07:46 -0800 (PST) To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/sparc64/ebus ebus.c src/sys/sparc64/include ofw_bus.h ver.h src/sys/sparc64/isa isa.c src/sys/sparc64/pci ofw_pci.c ofw_pci.h psycho.c src/sys/sparc64/sparc64 machdep.c ofw_bus.c X-FreeBSD-CVS-Branch: HEAD Sender: owner-cvs-all@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG tmm 2002/11/07 08:07:46 PST Modified files: sys/sparc64/ebus ebus.c sys/sparc64/include ofw_bus.h ver.h sys/sparc64/isa isa.c sys/sparc64/pci ofw_pci.c ofw_pci.h psycho.c sys/sparc64/sparc64 machdep.c ofw_bus.c Log: Add two new workaround for firmware anomalies: 1. At least some Netra t1 models have PCI buses with no associated interrupt map, but obviously expect the PCI swizzle to be done with the interrupt number from the higher level as intpin. In this case, the mapping also needs to continue at parent bus nodes. To handle that, add a quirk table based on the "name" property of the root node to avoid breaking other boxen. This property is now retrieved and printed at boot. 2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped at all, and full interrupt numbers (not just INOs) are given in the interrupt properties. This is more or less cosmetical; the PCI interrupt numbers would be wrong, but the psycho resource allocation method would pass the right numbers on anyway. Tested by: mux (1), Maxim Mazurok (2) Revision Changes Path 1.5 +1 -1 src/sys/sparc64/ebus/ebus.c 1.3 +4 -1 src/sys/sparc64/include/ofw_bus.h 1.4 +1 -0 src/sys/sparc64/include/ver.h 1.5 +2 -1 src/sys/sparc64/isa/isa.c 1.5 +64 -8 src/sys/sparc64/pci/ofw_pci.c 1.4 +5 -2 src/sys/sparc64/pci/ofw_pci.h 1.17 +1 -1 src/sys/sparc64/pci/psycho.c 1.71 +5 -0 src/sys/sparc64/sparc64/machdep.c 1.3 +19 -4 src/sys/sparc64/sparc64/ofw_bus.c To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message