From owner-svn-src-all@FreeBSD.ORG Wed Nov 9 05:30:25 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5B9DA1065701; Wed, 9 Nov 2011 05:30:25 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 4165A8FC15; Wed, 9 Nov 2011 05:30:25 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id pA95UPjk066233; Wed, 9 Nov 2011 05:30:25 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id pA95UPpn066229; Wed, 9 Nov 2011 05:30:25 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201111090530.pA95UPpn066229@svn.freebsd.org> From: Adrian Chadd Date: Wed, 9 Nov 2011 05:30:25 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r227375 - in head/sys/dev/ath: . ath_hal ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Nov 2011 05:30:25 -0000 Author: adrian Date: Wed Nov 9 05:30:24 2011 New Revision: 227375 URL: http://svn.freebsd.org/changeset/base/227375 Log: Add a new HAL parameter which forces a full reset rather than warm reset. This forces a full reset of the baseband/radio and seems needed to clear some issues (with Merlin at least) when the baseband gets confused in a very noisy environment. Sponsored by: Hobnob, Inc. Modified: head/sys/dev/ath/ath_hal/ah.h head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c head/sys/dev/ath/if_ath_sysctl.c Modified: head/sys/dev/ath/ath_hal/ah.h ============================================================================== --- head/sys/dev/ath/ath_hal/ah.h Wed Nov 9 05:25:30 2011 (r227374) +++ head/sys/dev/ath/ath_hal/ah.h Wed Nov 9 05:30:24 2011 (r227375) @@ -780,6 +780,7 @@ typedef struct int ah_dma_beacon_response_time;/* in TU's */ int ah_sw_beacon_response_time; /* in TU's */ int ah_additional_swba_backoff; /* in TU's */ + int ah_force_full_reset; /* force full chip reset rather then warm reset */ } HAL_OPS_CONFIG; /* Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Wed Nov 9 05:25:30 2011 (r227374) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Wed Nov 9 05:30:24 2011 (r227375) @@ -146,7 +146,9 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO /* For chips on which the RTC reset is done, save TSF before it gets cleared */ if (AR_SREV_HOWL(ah) || - (AR_SREV_MERLIN(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL))) + (AR_SREV_MERLIN(ah) && + ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) || + (ah->ah_config.ah_force_full_reset)) tsf = ar5416GetTsf64(ah); /* Mark PHY as inactive; marked active in ar5416InitBB() */ @@ -733,12 +735,15 @@ ar5416ChipReset(struct ath_hal *ah, cons { OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0); /* - * Warm reset is optimistic. + * Warm reset is optimistic for open-loop TX power control. */ if (AR_SREV_MERLIN(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) { if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) return AH_FALSE; + } else if (ah->ah_config.ah_force_full_reset) { + if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) + return AH_FALSE; } else { if (!ar5416SetResetReg(ah, HAL_RESET_WARM)) return AH_FALSE; Modified: head/sys/dev/ath/if_ath_sysctl.c ============================================================================== --- head/sys/dev/ath/if_ath_sysctl.c Wed Nov 9 05:25:30 2011 (r227374) +++ head/sys/dev/ath/if_ath_sysctl.c Wed Nov 9 05:30:24 2011 (r227375) @@ -893,4 +893,9 @@ ath_sysctl_hal_attach(struct ath_softc * SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW, &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0, "Atheros HAL additional SWBA backoff time"); + + sc->sc_ah->ah_config.ah_force_full_reset = 0; + SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW, + &sc->sc_ah->ah_config.ah_force_full_reset, 0, + "Force full chip reset rather than a warm reset"); }