Date: Wed, 4 Oct 2006 10:00:02 +0400 From: Eygene Ryabinkin <rea-fbsd@codelabs.ru> To: Tim Allender <freebsd-net@goldenpath.org> Cc: freebsd-net@freebsd.org Subject: Re: D-Link DGE-530T Message-ID: <20061004060002.GU1491@codelabs.ru> In-Reply-To: <20061004055741.GT1491@codelabs.ru> References: <4520695C.9060302@goldenpath.org> <20061002125254.GC25883@codelabs.ru> <4522655B.90507@goldenpath.org> <20061003134415.GP1491@codelabs.ru> <45227AD4.8060506@goldenpath.org> <20061003152034.GQ1491@codelabs.ru> <45228BB6.9020406@goldenpath.org> <20061004055741.GT1491@codelabs.ru>
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--ibTvN161/egqYuK8 Content-Type: text/plain; charset=koi8-r Content-Disposition: inline > The patch-file that will do the job is attached to this message. Oops, forgot to attach the file. About your previous message: lines aren't line up because you should extract the patchfile from the 'raw' PR, see the link at the bottom of the PR. -- Eygene --ibTvN161/egqYuK8 Content-Type: text/plain; charset=koi8-r Content-Disposition: attachment; filename="sk.patch" --- skORIG/if_sk.c Sat Jul 8 13:58:57 2006 +++ skNEW/if_sk.c Sat Jul 8 14:34:43 2006 @@ -196,6 +196,11 @@ DEVICEID_DLINK_DGE530T, "D-Link DGE-530T Gigabit Ethernet" }, + { + VENDORID_DLINK, + DEVICEID_DLINK_DGE530T_REV2, + "D-Link DGE-530T Gigabit Ethernet" + }, { 0, 0, NULL } }; @@ -1804,6 +1809,10 @@ case DEVICEID_3COM_3C940: case DEVICEID_LINKSYS_EG1032: case DEVICEID_DLINK_DGE530T: + /* Stay with VPD PN. */ + pname = sc->sk_vpd_prodname; + break; + case DEVICEID_DLINK_DGE530T_REV2: /* Stay with VPD PN. */ pname = sc->sk_vpd_prodname; break; --- skORIG/if_skreg.h Sat Jul 8 13:59:02 2006 +++ skNEW/if_skreg.h Sat Jul 8 14:34:55 2006 @@ -136,6 +136,11 @@ #define DEVICEID_DLINK_DGE530T 0x4c00 /* + * D-Link gigabit ethernet rev 2 device ID + */ +#define DEVICEID_DLINK_DGE530T_REV2 0x4b01 + +/* * GEnesis registers. The GEnesis chip has a 256-byte I/O window * but internally it has a 16K register space. This 16K space is * divided into 128-byte blocks. The first 128 bytes of the I/O --ibTvN161/egqYuK8--
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