From owner-svn-soc-all@FreeBSD.ORG Tue Jun 16 00:33:23 2015 Return-Path: Delivered-To: svn-soc-all@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id E2E8B150 for ; Tue, 16 Jun 2015 00:33:23 +0000 (UTC) (envelope-from pratiksinghal@FreeBSD.org) Received: from socsvn.freebsd.org (socsvn.freebsd.org [IPv6:2001:1900:2254:206a::50:2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C46A9334 for ; Tue, 16 Jun 2015 00:33:23 +0000 (UTC) (envelope-from pratiksinghal@FreeBSD.org) Received: from socsvn.freebsd.org ([127.0.1.124]) by socsvn.freebsd.org (8.14.9/8.14.9) with ESMTP id t5G0XNBF032889 for ; Tue, 16 Jun 2015 00:33:23 GMT (envelope-from pratiksinghal@FreeBSD.org) Received: (from www@localhost) by socsvn.freebsd.org (8.14.9/8.14.9/Submit) id t5G0XNOe032886 for svn-soc-all@FreeBSD.org; Tue, 16 Jun 2015 00:33:23 GMT (envelope-from pratiksinghal@FreeBSD.org) Date: Tue, 16 Jun 2015 00:33:23 GMT Message-Id: <201506160033.t5G0XNOe032886@socsvn.freebsd.org> X-Authentication-Warning: socsvn.freebsd.org: www set sender to pratiksinghal@FreeBSD.org using -f From: pratiksinghal@FreeBSD.org To: svn-soc-all@FreeBSD.org Subject: socsvn commit: r287148 - soc2015/pratiksinghal/cubie-head/sys/arm/allwinner MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-soc-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the entire Summer of Code repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Jun 2015 00:33:24 -0000 Author: pratiksinghal Date: Tue Jun 16 00:33:22 2015 New Revision: 287148 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=287148 Log: 1) Translation fault in the earlier commit removed. 2) DMA transfer working during kernel boot, but giving panic after the kernel boots. Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c ============================================================================== --- soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c Mon Jun 15 23:30:54 2015 (r287147) +++ soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c Tue Jun 16 00:33:22 2015 (r287148) @@ -294,10 +294,10 @@ a10_mmc_prepare_dma(struct a10_mmc_softc* sc) { - device_printf(sc->a10_dev, "Call to prepare dma\n") ; + //device_printf(sc->a10_dev, "Call to prepare dma\n") ; struct a10_mmc_dma_desc* dma = sc->a10_dma_desc ; struct mmc_command* cmd = sc->a10_req->cmd ; - device_printf(sc->a10_dev,"sc->a10_req = %p, sc->a10_req->cmd = %p, sc->a10_req->cmd->data = %p, dma = %p\n", sc->a10_req,sc->a10_req->cmd,sc->a10_req->cmd->data,dma) ; + //device_printf(sc->a10_dev,"sc->a10_req = %p, sc->a10_req->cmd = %p, sc->a10_req->cmd->data = %p, dma = %p\n", sc->a10_req,sc->a10_req->cmd,sc->a10_req->cmd->data,dma) ; int read = (sc->a10_req->cmd->data->flags & MMC_DATA_WRITE) ? 0 : 1 ; bus_addr_t desc_paddr = (sc->a10_dma_cb_arg).addr ; bus_size_t off = 0 ; @@ -354,7 +354,7 @@ bus_dmamap_sync(sc->a10_dma_tag, sc->a10_dma_map, BUS_DMASYNC_PREWRITE) ; /* Enable DMA and interrupts*/ - device_printf(sc->a10_dev, "Previous value of gctrl was 0x%08X and new value is 0x%08X\n", A10_MMC_READ_4(sc, A10_MMC_GCTRL), A10_MMC_READ_4(sc,A10_MMC_GCTRL) | A10_MMC_DMA_ENABLE | A10_MMC_INT_ENABLE) ; + //device_printf(sc->a10_dev, "Previous value of gctrl was 0x%08X and new value is 0x%08X\n", A10_MMC_READ_4(sc, A10_MMC_GCTRL), A10_MMC_READ_4(sc,A10_MMC_GCTRL) | A10_MMC_DMA_ENABLE | A10_MMC_INT_ENABLE) ; val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) ; val |= A10_MMC_DMA_ENABLE ; val |= A10_MMC_INT_ENABLE ; @@ -390,7 +390,7 @@ /* Disable debounce*/ //A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, A10_MMC_READ_4(sc, A10_MMC_GCTRL) & (~A10_MMC_DEBOUNCE_ENABLE)); - device_printf(sc->a10_dev, "Completed the prepare function\n") ; + //device_printf(sc->a10_dev, "Completed the prepare function\n") ; return (0) ; } @@ -451,7 +451,6 @@ return (ETIMEDOUT); } - device_printf(sc->a10_dev, "The resetted value is %#x\n", A10_MMC_READ_4(sc, A10_MMC_GCTRL)) ; /* Set the timeout. */ A10_MMC_WRITE_4(sc, A10_MMC_TIMEOUT, 0xffffffff); @@ -466,10 +465,8 @@ A10_MMC_RX_DATA_REQ | A10_MMC_TX_DATA_REQ); uint32_t temp_val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) | A10_MMC_INT_ENABLE | A10_MMC_ACCESS_BY_AHB ; temp_val = temp_val & (~A10_MMC_DMA_ENABLE) ; - device_printf(sc->a10_dev, "The value I am writing is %#x\n",temp_val) ; /* Enable interrupts and AHB access. */ A10_MMC_WRITE_4(sc, A10_MMC_GCTRL,temp_val) ; - device_printf(sc->a10_dev,"Reset succesfully in reset function %#x\n", A10_MMC_READ_4(sc, A10_MMC_GCTRL)) ; return (0); } @@ -555,7 +552,6 @@ int i, write; uint32_t bit, *buf; - device_printf(sc->a10_dev, "Doing pio transfer\n") ; buf = (uint32_t *)data->data; write = (data->flags & MMC_DATA_WRITE) ? 1 : 0; bit = write ? A10_MMC_FIFO_FULL : A10_MMC_FIFO_EMPTY; @@ -593,9 +589,7 @@ A10_MMC_WRITE_4(sc, A10_MMC_RINTR, rint) ; A10_MMC_WRITE_4(sc, A10_MMC_IDST, idst) ; A10_MMC_WRITE_4(sc, A10_MMC_IMASK, imask) ; -#ifdef DEBUG - device_printf(sc->a10_dev, "imask: %#x, rint: %#x, idst: %#x, gctrl: %#x\n", imask, rint,idst, A10_MMC_READ_4(sc, A10_MMC_GCTRL)); -#endif + //device_printf(sc->a10_dev, "imask: %#x, rint: %#x, idst: %#x, gctrl: %#x\n", imask, rint,idst, A10_MMC_READ_4(sc, A10_MMC_GCTRL)); if (sc->a10_req == NULL) { device_printf(sc->a10_dev, "Spurious interrupt - no active request, rint: 0x%08X\n", @@ -650,7 +644,7 @@ sc->a10_intr |= rint; data = sc->a10_req->cmd->data; - device_printf(sc->a10_dev, "Data is %p\n", data) ; + //device_printf(sc->a10_dev, "Data is %p\n", data) ; if (data != NULL && (rint & (A10_MMC_DATA_OVER | A10_MMC_RX_DATA_REQ | A10_MMC_TX_DATA_REQ)) != 0) a10_mmc_pio_transfer(sc, data); @@ -720,6 +714,7 @@ uint32_t temp_val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) | A10_MMC_INT_ENABLE | A10_MMC_ACCESS_BY_AHB ; temp_val = temp_val & (~A10_MMC_DMA_ENABLE) ; A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, temp_val) ; + device_printf(sc->a10_dev, "Before page faullt (1)\n") ; device_printf(sc->a10_dev, "Couldn't prepare DMA, using pio instead\n") ; } } @@ -727,6 +722,7 @@ { uint32_t temp_val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) | A10_MMC_INT_ENABLE | A10_MMC_ACCESS_BY_AHB ; temp_val = temp_val & (~A10_MMC_DMA_ENABLE) ; + device_printf(sc->a10_dev, "Before page fault (2)\n") ; A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, temp_val) ; device_printf(sc->a10_dev, "Couldn't transfer this data with DMA, using pio instead\n") ; }