From owner-svn-src-head@FreeBSD.ORG Fri Mar 13 06:28:20 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B6445106566C; Fri, 13 Mar 2009 06:28:20 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A3C1F8FC0A; Fri, 13 Mar 2009 06:28:20 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n2D6SKjr054418; Fri, 13 Mar 2009 06:28:20 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n2D6SK7s054414; Fri, 13 Mar 2009 06:28:20 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <200903130628.n2D6SK7s054414@svn.freebsd.org> From: Rafal Jaworowski Date: Fri, 13 Mar 2009 06:28:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r189757 - in head/sys/powerpc: include mpc85xx X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Mar 2009 06:28:21 -0000 Author: raj Date: Fri Mar 13 06:28:20 2009 New Revision: 189757 URL: http://svn.freebsd.org/changeset/base/189757 Log: Make MPC85xx LAW handling and reset routines aware of the MPC8548 variant. Inspired by discussion with Alexey V Fedorov on freebsd-powerpc@. Modified: head/sys/powerpc/include/spr.h head/sys/powerpc/mpc85xx/mpc85xx.c head/sys/powerpc/mpc85xx/mpc85xx.h head/sys/powerpc/mpc85xx/ocpbus.c Modified: head/sys/powerpc/include/spr.h ============================================================================== --- head/sys/powerpc/include/spr.h Fri Mar 13 06:06:20 2009 (r189756) +++ head/sys/powerpc/include/spr.h Fri Mar 13 06:28:20 2009 (r189757) @@ -564,6 +564,8 @@ #define SVR_MPC8533E 0x8034 #define SVR_MPC8541 0x8072 #define SVR_MPC8541E 0x807a +#define SVR_MPC8548 0x8031 +#define SVR_MPC8548E 0x8039 #define SVR_MPC8555 0x8071 #define SVR_MPC8555E 0x8079 #define SVR_MPC8572 0x80e0 Modified: head/sys/powerpc/mpc85xx/mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/mpc85xx.c Fri Mar 13 06:06:20 2009 (r189756) +++ head/sys/powerpc/mpc85xx/mpc85xx.c Fri Mar 13 06:28:20 2009 (r189757) @@ -61,7 +61,7 @@ ccsr_write4(uintptr_t addr, uint32_t val __asm __volatile("eieio; sync"); } -static __inline int +int law_getmax(void) { uint32_t ver; @@ -69,6 +69,8 @@ law_getmax(void) ver = SVR_VER(mfspr(SPR_SVR)); if (ver == SVR_MPC8572E || ver == SVR_MPC8572) return (12); + else if (ver == SVR_MPC8548E || ver == SVR_MPC8548) + return (10); else return (8); } @@ -132,7 +134,8 @@ cpu_reset(void) { uint32_t ver = SVR_VER(mfspr(SPR_SVR)); - if (ver == SVR_MPC8572E || ver == SVR_MPC8572) + if (ver == SVR_MPC8572E || ver == SVR_MPC8572 || + ver == SVR_MPC8548E || ver == SVR_MPC8548) /* Systems with dedicated reset register */ ccsr_write4(OCP85XX_RSTCR, 2); else { Modified: head/sys/powerpc/mpc85xx/mpc85xx.h ============================================================================== --- head/sys/powerpc/mpc85xx/mpc85xx.h Fri Mar 13 06:06:20 2009 (r189756) +++ head/sys/powerpc/mpc85xx/mpc85xx.h Fri Mar 13 06:28:20 2009 (r189757) @@ -33,5 +33,6 @@ uint32_t ccsr_read4(uintptr_t addr); void ccsr_write4(uintptr_t addr, uint32_t val); int law_enable(int trgt, u_long addr, u_long size); int law_disable(int trgt, u_long addr, u_long size); +int law_getmax(void); #endif /* _MPC85XX_H_ */ Modified: head/sys/powerpc/mpc85xx/ocpbus.c ============================================================================== --- head/sys/powerpc/mpc85xx/ocpbus.c Fri Mar 13 06:06:20 2009 (r189756) +++ head/sys/powerpc/mpc85xx/ocpbus.c Fri Mar 13 06:28:20 2009 (r189757) @@ -114,8 +114,6 @@ devclass_t ocpbus_devclass; DRIVER_MODULE(ocpbus, nexus, ocpbus_driver, ocpbus_devclass, 0, 0); -static int law_max = 0; - static device_t ocpbus_mk_child(device_t dev, int type, int unit) { @@ -189,16 +187,6 @@ ocpbus_write_law(int trgt, int type, u_l static int ocpbus_probe(device_t dev) { - struct ocpbus_softc *sc; - uint32_t ver; - - sc = device_get_softc(dev); - - ver = SVR_VER(mfspr(SPR_SVR)); - if (ver == SVR_MPC8572E || ver == SVR_MPC8572) - law_max = 12; - else - law_max = 8; device_set_desc(dev, "On-Chip Peripherals bus"); return (BUS_PROBE_DEFAULT); @@ -208,7 +196,7 @@ static int ocpbus_attach(device_t dev) { struct ocpbus_softc *sc; - int error, i, tgt; + int error, i, tgt, law_max; uint32_t sr; u_long start, end; @@ -261,6 +249,7 @@ ocpbus_attach(device_t dev) * Clear local access windows. Skip DRAM entries, so we don't shoot * ourselves in the foot. */ + law_max = law_getmax(); for (i = 0; i < law_max; i++) { sr = ccsr_read4(OCP85XX_LAWSR(i)); if ((sr & 0x80000000) == 0)