From owner-svn-src-head@FreeBSD.ORG Sun Sep 7 21:46:54 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A6734CD2; Sun, 7 Sep 2014 21:46:54 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 91EA11056; Sun, 7 Sep 2014 21:46:54 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s87LksZV026507; Sun, 7 Sep 2014 21:46:54 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s87LksmU026506; Sun, 7 Sep 2014 21:46:54 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201409072146.s87LksmU026506@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sun, 7 Sep 2014 21:46:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r271240 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 07 Sep 2014 21:46:54 -0000 Author: andrew Date: Sun Sep 7 21:46:54 2014 New Revision: 271240 URL: http://svnweb.freebsd.org/changeset/base/271240 Log: When entering the kernel with the MMU off assume we are running from a va == pa map. I'm not sure the code would work if we are not running from the identity map as the ARM core may attempt to read the next instruction from an invalid memory location. Modified: head/sys/arm/arm/locore.S Modified: head/sys/arm/arm/locore.S ============================================================================== --- head/sys/arm/arm/locore.S Sun Sep 7 21:40:14 2014 (r271239) +++ head/sys/arm/arm/locore.S Sun Sep 7 21:46:54 2014 (r271240) @@ -127,10 +127,6 @@ Lram_offset: .word from_ram-_C_LABEL(_st from_ram: nop #endif - adr r7, Lunmapped - bic r7, r7, #0xf0000000 - orr r7, r7, #PHYSADDR - disable_mmu: /* Disable MMU for a while */ @@ -144,7 +140,8 @@ disable_mmu: nop nop nop - mov pc, r7 + CPWAIT(r0) + Lunmapped: /* * Build page table from scratch.