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From: Don Lewis <Don.Lewis@tsc.tdk.com>
Message-Id: <199810230147.SAA19488@salsa.gv.tsc.tdk.com>
Date: Thu, 22 Oct 1998 18:47:39 -0700
In-Reply-To: Mike Smith <mike@smith.net.au>
       "Re: ECC memory support" (Oct 22,  4:19pm)
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To: Mike Smith <mike@smith.net.au>, Don Lewis <Don.Lewis@tsc.tdk.com>
Subject: Re: ECC memory support
Cc: Burkard Meyendriesch <bm@malepartus.de>, freebsd-stable@FreeBSD.ORG
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On Oct 22,  4:19pm, Mike Smith wrote:
} Subject: Re: ECC memory support

} Firstly, there's no guarantee that you're going to *get* an NMI on a 
} soft ECC error.  If the design integrates error detection into the 
} BIOS, you're going to get an SMI and the BIOS will run regardless.

This is an area that I'm very unfamiliar with.  Who sets up the interrupt
vector so that the BIOS gets control?  I presume it's the BIOS and the
kernel is careful not to change the vector.

} If you did, there would be no point in calling the BIOS, as you already 
} know what's going on.

Ok, and I assume that if the kernel gets an SMI it is non-fatal, unlike
what currently happens with an NMI.

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