From owner-svn-src-projects@FreeBSD.ORG Thu Mar 24 18:41:26 2011 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 85E7D1065676; Thu, 24 Mar 2011 18:41:26 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from asmtpout030.mac.com (asmtpout030.mac.com [17.148.16.105]) by mx1.freebsd.org (Postfix) with ESMTP id 6966D8FC15; Thu, 24 Mar 2011 18:41:26 +0000 (UTC) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; CHARSET=US-ASCII Received: from sa-nc-spg-121.static.jnpr.net (natint3.juniper.net [66.129.224.36]) by asmtp030.mac.com (Oracle Communications Messaging Exchange Server 7u4-20.01 64bit (built Nov 21 2010)) with ESMTPSA id <0LIK00ICZP435L50@asmtp030.mac.com>; Thu, 24 Mar 2011 10:40:53 -0700 (PDT) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.2.15,1.0.148,0.0.0000 definitions=2011-03-24_02:2011-03-23, 2011-03-24, 1970-01-01 signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 ipscore=0 suspectscore=2 phishscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx engine=6.0.2-1012030000 definitions=main-1103240084 From: Marcel Moolenaar In-reply-to: <201103241304.37386.jhb@freebsd.org> Date: Thu, 24 Mar 2011 10:40:51 -0700 Message-id: <6B3F12C8-BD43-419E-B5FF-CA5035040860@mac.com> References: <201103241656.p2OGuY6k051706@svn.freebsd.org> <201103241304.37386.jhb@freebsd.org> To: John Baldwin X-Mailer: Apple Mail (2.1084) Cc: svn-src-projects@freebsd.org, Marcel Moolenaar , src-committers@freebsd.org Subject: Re: svn commit: r219964 - projects/altix/sys/ia64/sgisn X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Mar 2011 18:41:26 -0000 On Mar 24, 2011, at 10:04 AM, John Baldwin wrote: > On Thursday, March 24, 2011 12:56:34 pm Marcel Moolenaar wrote: >> Author: marcel >> Date: Thu Mar 24 16:56:33 2011 >> New Revision: 219964 >> URL: http://svn.freebsd.org/changeset/base/219964 >> >> Log: >> Add necessary address space mapping. The Altix architecture has distinct >> address spaces for PCI devices and CPUs. That is, the S-Hub translates >> addresses on the FSB and coming from CPUs to addresses valid on the PCI bus. >> This is abstracted and implemented in FreeBSD by having the handle contain the >> CPU address, while the resource itself describes the PCI bus address. Since >> devices are mapped when resources are activated and the bus handle is derived >> from that, have the SGI PCI bus driver handle the activation of resources >> instead of passing it up to the nexus. >> >> Note that the Altix architecture allows for IRQ values larger than 255 even >> though the intline register in the PCI configuration space does not. FreeBSD >> also doesn't support it by virtue of having an IRQ resource space that's >> limited. On my machines the IRQ values are within bounds so I'm not going to >> worry about this detail. It may very well be theoretical. > > FreeBSD certainly supports any arbitrary range of unsigned long values as IRQ > resources. MSI on x86 uses IRQs > 255 for example. The PCI bus code does > assume that IRQ 255 is a cookie value that can be used for an invalid INTx > IRQ, but that's the only assumption it makes. > > The limit on the IRQ rman in the nexus is put in place by each platform. If > you want a larger range, just fix the initialization of your rman. That's what I said in the commit log :-) It's not a problem, so I'm not going to worry about it. Getting interrupts to work is a problem. Since there's no I/O SAPIC but some other odd handshaking, I do need to abstract PICs like we did on PowerPC. BTW: Do you think it's feasible or worthwhile to move all of the interrupt handling to MI if we have an MI abstraction of PICs? With multiple passes of bus enumeration we should be able to probe and attach all PIC devices that implement a standard PIC interface for MI code to use, right? On PowerPC we have very good results so far and all we're lacking there is the multi-pass support so that we can map the multiple PICs onto the flat IRQ resource space before we need to now that mapping (which is currently handled by a kluge, really). -- Marcel Moolenaar xcllnt@mac.com