From owner-svn-src-head@freebsd.org Sat Nov 19 01:51:58 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id CAF81C49A78; Sat, 19 Nov 2016 01:51:58 +0000 (UTC) (envelope-from cognet@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A6406127E; Sat, 19 Nov 2016 01:51:58 +0000 (UTC) (envelope-from cognet@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id uAJ1pvoI098271; Sat, 19 Nov 2016 01:51:57 GMT (envelope-from cognet@FreeBSD.org) Received: (from cognet@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id uAJ1pv6l098264; Sat, 19 Nov 2016 01:51:57 GMT (envelope-from cognet@FreeBSD.org) Message-Id: <201611190151.uAJ1pv6l098264@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cognet set sender to cognet@FreeBSD.org using -f From: Olivier Houchard Date: Sat, 19 Nov 2016 01:51:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r308822 - in head/sys/arm: conf ti ti/am335x ti/omap4 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Nov 2016 01:51:58 -0000 Author: cognet Date: Sat Nov 19 01:51:56 2016 New Revision: 308822 URL: https://svnweb.freebsd.org/changeset/base/308822 Log: Resolv the remaining conflicting symbols between omap4 and am335x, and add omap4/pandaboard into the GENERIC kernel. Modified: head/sys/arm/conf/GENERIC head/sys/arm/ti/am335x/am335x_scm_padconf.c head/sys/arm/ti/am335x/am335x_scm_padconf.h head/sys/arm/ti/omap4/omap4_scm_padconf.c head/sys/arm/ti/omap4/omap4_scm_padconf.h head/sys/arm/ti/ti_machdep.c head/sys/arm/ti/ti_pinmux.c Modified: head/sys/arm/conf/GENERIC ============================================================================== --- head/sys/arm/conf/GENERIC Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/conf/GENERIC Sat Nov 19 01:51:56 2016 (r308822) @@ -43,6 +43,7 @@ files "../nvidia/tegra124/files.tegra12 files "../qemu/files.qemu" files "../ti/files.ti" files "../ti/am335x/files.am335x" +files "../ti/omap4/files.omap4" options SOC_ALLWINNER_A10 options SOC_ALLWINNER_A13 @@ -53,6 +54,7 @@ options SOC_ALLWINNER_A83T options SOC_ALLWINNER_H3 options SOC_BCM2836 options SOC_TI_AM335X +options SOC_OMAP4 options SCHED_ULE # ULE scheduler options SMP # Enable multiple cores @@ -80,6 +82,7 @@ device pmu # ARM Generic Timer device generic_timer +device mpcore_timer # MMC/SD/SDIO Card slot support device sdhci # SD controller @@ -129,6 +132,9 @@ device ti_i2c device am335x_pmic # AM335x Power Management IC (TPC65217) device am335x_rtc # RTC support (power management only) #define am335x_dmtpps # Pulse Per Second capture driver +device twl # TI TWLX0X0/TPS659x0 Power Management +device twl_vreg # twl voltage regulation +device twl_clks # twl external clocks # GPIO device gpio @@ -214,9 +220,12 @@ device ti_pruss # Mailbox support device ti_mbox +# DMA controller +device ti_sdma + # Extensible Firmware Interface options EFI # Flattened Device Tree options FDT # Configure using FDT/DTB data -makeoptions MODULES_EXTRA="dtb/allwinner dtb/am335x dtb/nvidia dtb/rpi" +makeoptions MODULES_EXTRA="dtb/allwinner dtb/am335x dtb/nvidia dtb/rpi dtb/omap4" Modified: head/sys/arm/ti/am335x/am335x_scm_padconf.c ============================================================================== --- head/sys/arm/ti/am335x/am335x_scm_padconf.c Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/am335x/am335x_scm_padconf.c Sat Nov 19 01:51:56 2016 (r308822) @@ -293,7 +293,7 @@ const static struct ti_pinmux_padconf ti { .ballname = NULL }, }; -const struct ti_pinmux_device ti_pinmux_dev = { +const struct ti_pinmux_device ti_am335x_pinmux_dev = { .padconf_muxmode_mask = 0x7, .padconf_sate_mask = 0x78, .padstate = ti_padstate_devmap, Modified: head/sys/arm/ti/am335x/am335x_scm_padconf.h ============================================================================== --- head/sys/arm/ti/am335x/am335x_scm_padconf.h Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/am335x/am335x_scm_padconf.h Sat Nov 19 01:51:56 2016 (r308822) @@ -42,4 +42,6 @@ #define PADCONF_INPUT_PULLDOWN (RXACTIVE) #define PADCONF_INPUT_PULLUP_SLOW (PADCONF_INPUT_PULLUP | SLEWCTRL) +extern const struct ti_pinmux_device ti_am335x_pinmux_dev; + #endif /* AM335X_SCM_PADCONF_H */ Modified: head/sys/arm/ti/omap4/omap4_scm_padconf.c ============================================================================== --- head/sys/arm/ti/omap4/omap4_scm_padconf.c Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/omap4/omap4_scm_padconf.c Sat Nov 19 01:51:56 2016 (r308822) @@ -295,7 +295,7 @@ const static struct ti_pinmux_padconf ti { .ballname = NULL }, }; -const struct ti_pinmux_device ti_pinmux_dev = { +const struct ti_pinmux_device omap4_pinmux_dev = { .padconf_muxmode_mask = CONTROL_PADCONF_MUXMODE_MASK, .padconf_sate_mask = CONTROL_PADCONF_SATE_MASK, .padstate = ti_padstate_devmap, Modified: head/sys/arm/ti/omap4/omap4_scm_padconf.h ============================================================================== --- head/sys/arm/ti/omap4/omap4_scm_padconf.h Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/omap4/omap4_scm_padconf.h Sat Nov 19 01:51:56 2016 (r308822) @@ -78,4 +78,6 @@ | CONTROL_PADCONF_OFF_PULL_ENABLE) #define PADCONF_PIN_OFF_WAKEUPENABLE CONTROL_PADCONF_WAKEUP_ENABLE +extern const struct ti_pinmux_device omap4_pinmux_dev; + #endif /* OMAP4_SCM_PADCONF_H */ Modified: head/sys/arm/ti/ti_machdep.c ============================================================================== --- head/sys/arm/ti/ti_machdep.c Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/ti_machdep.c Sat Nov 19 01:51:56 2016 (r308822) @@ -139,7 +139,7 @@ static platform_method_t omap4_methods[] #endif PLATFORMMETHOD_END, }; -FDT_PLATFORM_DEF(omap4, "omap4", 0, "ti,omap4430", 0); +FDT_PLATFORM_DEF(omap4, "omap4", 0, "ti,omap4430", 200); #endif #if defined(SOC_TI_AM335X) Modified: head/sys/arm/ti/ti_pinmux.c ============================================================================== --- head/sys/arm/ti/ti_pinmux.c Sat Nov 19 01:36:44 2016 (r308821) +++ head/sys/arm/ti/ti_pinmux.c Sat Nov 19 01:51:56 2016 (r308822) @@ -54,6 +54,9 @@ __FBSDID("$FreeBSD$"); #include #include +#include +#include +#include #include "ti_pinmux.h" struct pincfg { @@ -85,7 +88,7 @@ static struct ti_pinmux_softc *ti_pinmux * files and is specific to the given SoC platform. Each entry in the array * corresponds to an individual pin. */ -extern const struct ti_pinmux_device ti_pinmux_dev; +static const struct ti_pinmux_device *ti_pinmux_dev; /** @@ -101,7 +104,7 @@ ti_pinmux_padconf_from_name(const char * { const struct ti_pinmux_padconf *padconf; - padconf = ti_pinmux_dev.padconf; + padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (strcmp(ballname, padconf->ballname) == 0) return(padconf); @@ -134,7 +137,7 @@ ti_pinmux_padconf_set_internal(struct ti uint16_t reg_val; /* populate the new value for the PADCONF register */ - reg_val = (uint16_t)(state & ti_pinmux_dev.padconf_sate_mask); + reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask); /* find the new mode requested */ for (mode = 0; mode < 8; mode++) { @@ -151,7 +154,7 @@ ti_pinmux_padconf_set_internal(struct ti } /* set the mux mode */ - reg_val |= (uint16_t)(mode & ti_pinmux_dev.padconf_muxmode_mask); + reg_val |= (uint16_t)(mode & ti_pinmux_dev->padconf_muxmode_mask); if (bootverbose) device_printf(sc->sc_dev, "setting internal %x for %s\n", @@ -226,11 +229,11 @@ ti_pinmux_padconf_get(const char *padnam /* save the state */ if (state) - *state = (reg_val & ti_pinmux_dev.padconf_sate_mask); + *state = (reg_val & ti_pinmux_dev->padconf_sate_mask); /* save the mode */ if (muxmode) - *muxmode = padconf->muxmodes[(reg_val & ti_pinmux_dev.padconf_muxmode_mask)]; + *muxmode = padconf->muxmodes[(reg_val & ti_pinmux_dev->padconf_muxmode_mask)]; return (0); } @@ -259,7 +262,7 @@ ti_pinmux_padconf_set_gpiomode(uint32_t return (ENXIO); /* find the gpio pin in the padconf array */ - padconf = ti_pinmux_dev.padconf; + padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (padconf->gpio_pin == gpio) break; @@ -269,10 +272,10 @@ ti_pinmux_padconf_set_gpiomode(uint32_t return (EINVAL); /* populate the new value for the PADCONF register */ - reg_val = (uint16_t)(state & ti_pinmux_dev.padconf_sate_mask); + reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask); /* set the mux mode */ - reg_val |= (uint16_t)(padconf->gpio_mode & ti_pinmux_dev.padconf_muxmode_mask); + reg_val |= (uint16_t)(padconf->gpio_mode & ti_pinmux_dev->padconf_muxmode_mask); /* write the register value (16-bit writes) */ ti_pinmux_write_2(ti_pinmux_sc, padconf->reg_off, reg_val); @@ -304,7 +307,7 @@ ti_pinmux_padconf_get_gpiomode(uint32_t return (ENXIO); /* find the gpio pin in the padconf array */ - padconf = ti_pinmux_dev.padconf; + padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (padconf->gpio_pin == gpio) break; @@ -317,12 +320,12 @@ ti_pinmux_padconf_get_gpiomode(uint32_t reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off); /* check to make sure the pins is configured as GPIO in the first state */ - if ((reg_val & ti_pinmux_dev.padconf_muxmode_mask) != padconf->gpio_mode) + if ((reg_val & ti_pinmux_dev->padconf_muxmode_mask) != padconf->gpio_mode) return (EINVAL); /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ if (state) - *state = (reg_val & ti_pinmux_dev.padconf_sate_mask); + *state = (reg_val & ti_pinmux_dev->padconf_sate_mask); return (0); } @@ -381,6 +384,22 @@ ti_pinmux_probe(device_t dev) __func__); return (EEXIST); } + switch (ti_chip()) { +#ifdef SOC_OMAP4 + case CHIP_OMAP_4: + ti_pinmux_dev = &omap4_pinmux_dev; + break; +#endif +#ifdef SOC_TI_AM335X + case CHIP_AM335X: + ti_pinmux_dev = &ti_am335x_pinmux_dev; + break; +#endif + default: + printf("Unknown CPU in pinmux\n"); + return (ENXIO); + } + device_set_desc(dev, "TI Pinmux Module"); return (BUS_PROBE_DEFAULT);