From owner-svn-src-all@FreeBSD.ORG Thu Sep 13 19:08:31 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id B9474106566C; Thu, 13 Sep 2012 19:08:31 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 9ABE58FC17; Thu, 13 Sep 2012 19:08:31 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q8DJ8V2w057061; Thu, 13 Sep 2012 19:08:31 GMT (envelope-from jhb@svn.freebsd.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q8DJ8V4s057058; Thu, 13 Sep 2012 19:08:31 GMT (envelope-from jhb@svn.freebsd.org) Message-Id: <201209131908.q8DJ8V4s057058@svn.freebsd.org> From: John Baldwin Date: Thu, 13 Sep 2012 19:08:31 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r240474 - head/usr.sbin/pciconf X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Sep 2012 19:08:31 -0000 Author: jhb Date: Thu Sep 13 19:08:31 2012 New Revision: 240474 URL: http://svn.freebsd.org/changeset/base/240474 Log: - Denote PCI-e endpoints that support FLR. - Make parsing of PCI-e extended capabilities assume that future version numbers are backwards compatible. - Add new AER error descriptions. - Add descriptions for more PCI-e extended capabilities. MFC after: 1 week Modified: head/usr.sbin/pciconf/cap.c head/usr.sbin/pciconf/err.c Modified: head/usr.sbin/pciconf/cap.c ============================================================================== --- head/usr.sbin/pciconf/cap.c Thu Sep 13 19:05:24 2012 (r240473) +++ head/usr.sbin/pciconf/cap.c Thu Sep 13 19:08:31 2012 (r240474) @@ -412,6 +412,8 @@ cap_express(int fd, struct pci_conf *p, printf(" max data %d(%d)", MAX_PAYLOAD((flags & PCIM_EXP_CTL_MAX_PAYLOAD) >> 5), MAX_PAYLOAD(val & PCIM_EXP_CAP_MAX_PAYLOAD)); + if (val & PCIM_EXP_CAP_FLR) + printf(" FLR"); val = read_config(fd, &p->pc_sel, ptr + PCIR_EXPRESS_LINK_CAP, 4); flags = read_config(fd, &p->pc_sel, ptr+ PCIR_EXPRESS_LINK_STA, 2); printf(" link x%d(x%d)", (flags & PCIM_LINK_STA_WIDTH) >> 4, @@ -561,7 +563,7 @@ ecap_aer(int fd, struct pci_conf *p, uin uint32_t sta, mask; printf("AER %d", ver); - if (ver != 1) + if (ver < 1) return; sta = read_config(fd, &p->pc_sel, ptr + PCIR_AER_UC_STATUS, 4); mask = read_config(fd, &p->pc_sel, ptr + PCIR_AER_UC_SEVERITY, 4); @@ -577,7 +579,7 @@ ecap_vc(int fd, struct pci_conf *p, uint uint32_t cap1; printf("VC %d", ver); - if (ver != 1) + if (ver < 1) return; cap1 = read_config(fd, &p->pc_sel, ptr + PCIR_VC_CAP1, 4); printf(" max VC%d", cap1 & PCIM_VC_CAP1_EXT_COUNT); @@ -592,7 +594,7 @@ ecap_sernum(int fd, struct pci_conf *p, uint32_t high, low; printf("Serial %d", ver); - if (ver != 1) + if (ver < 1) return; low = read_config(fd, &p->pc_sel, ptr + PCIR_SERIAL_LOW, 4); high = read_config(fd, &p->pc_sel, ptr + PCIR_SERIAL_HIGH, 4); @@ -600,10 +602,58 @@ ecap_sernum(int fd, struct pci_conf *p, } static void +ecap_vendor(int fd, struct pci_conf *p, uint16_t ptr, uint8_t ver) +{ + uint32_t val; + + printf("Vendor %d", ver); + if (ver < 1) + return; + val = read_config(fd, &p->pc_sel, ptr + 4, 4); + printf(" ID %d", val & 0xffff); +} + +static void +ecap_sec_pcie(int fd, struct pci_conf *p, uint16_t ptr, uint8_t ver) +{ + uint32_t val; + + printf("PCIe Sec %d", ver); + if (ver < 1) + return; + val = read_config(fd, &p->pc_sel, ptr + 8, 4); + printf(" lane errors %#x", val); +} + +struct { + uint16_t id; + const char *name; +} ecap_names[] = { + { PCIZ_PWRBDGT, "Power Budgeting" }, + { PCIZ_RCLINK_DCL, "Root Complex Link Declaration" }, + { PCIZ_RCLINK_CTL, "Root Complex Internal Link Control" }, + { PCIZ_RCEC_ASSOC, "Root Complex Event Collector ASsociation" }, + { PCIZ_MFVC, "MFVC" }, + { PCIZ_RCRB, "RCRB" }, + { PCIZ_ACS, "ACS" }, + { PCIZ_ARI, "ARI" }, + { PCIZ_ATS, "ATS" }, + { PCIZ_SRIOV, "SRIOV" }, + { PCIZ_MULTICAST, "Multicast" }, + { PCIZ_RESIZE_BAR, "Resizable BAR" }, + { PCIZ_DPA, "DPA" }, + { PCIZ_TPH_REQ, "TPH Requester" }, + { PCIZ_LTR, "LTR" }, + { 0, NULL } +}; + +static void list_ecaps(int fd, struct pci_conf *p) { + const char *name; uint32_t ecap; uint16_t ptr; + int i; ptr = PCIR_EXTCAP; ecap = read_config(fd, &p->pc_sel, ptr, 4); @@ -621,8 +671,20 @@ list_ecaps(int fd, struct pci_conf *p) case PCIZ_SERNUM: ecap_sernum(fd, p, ptr, PCI_EXTCAP_VER(ecap)); break; + case PCIZ_VENDOR: + ecap_vendor(fd, p, ptr, PCI_EXTCAP_VER(ecap)); + break; + case PCIZ_SEC_PCIE: + ecap_sec_pcie(fd, p, ptr, PCI_EXTCAP_VER(ecap)); + break; default: - printf("unknown %d", PCI_EXTCAP_VER(ecap)); + name = "unknown"; + for (i = 0; ecap_names[i].name != NULL; i++) + if (ecap_names[i].id == PCI_EXTCAP_ID(ecap)) { + name = ecap_names[i].name; + break; + } + printf("%s %d", name, PCI_EXTCAP_VER(ecap)); break; } printf("\n"); Modified: head/usr.sbin/pciconf/err.c ============================================================================== --- head/usr.sbin/pciconf/err.c Thu Sep 13 19:05:24 2012 (r240473) +++ head/usr.sbin/pciconf/err.c Thu Sep 13 19:08:31 2012 (r240474) @@ -91,6 +91,10 @@ static struct bit_table aer_uc[] = { { PCIM_AER_UC_ECRC_ERROR, "ECRC Error" }, { PCIM_AER_UC_UNSUPPORTED_REQUEST, "Unsupported Request" }, { PCIM_AER_UC_ACS_VIOLATION, "ACS Violation" }, + { PCIM_AER_UC_INTERNAL_ERROR, "Uncorrectable Internal Error" }, + { PCIM_AER_UC_MC_BLOCKED_TLP, "MC Blocked TLP" }, + { PCIM_AER_UC_ATOMIC_EGRESS_BLK, "AtomicOp Egress Blocked" }, + { PCIM_AER_UC_TLP_PREFIX_BLOCKED, "TLP Prefix Blocked Error" }, { 0, NULL }, }; @@ -102,6 +106,8 @@ static struct bit_table aer_cor[] = { { PCIM_AER_COR_REPLAY_ROLLOVER, "REPLAY_NUM Rollover" }, { PCIM_AER_COR_REPLAY_TIMEOUT, "Replay Timer Timeout" }, { PCIM_AER_COR_ADVISORY_NF_ERROR, "Advisory Non-Fatal Error" }, + { PCIM_AER_COR_INTERNAL_ERROR, "Corrected Internal Error" }, + { PCIM_AER_COR_HEADER_LOG_OVFLOW, "Header Log Overflow" }, { 0, NULL }, };