From owner-svn-src-all@freebsd.org Thu Jul 4 14:15:05 2019 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B4C3F15D6A1A; Thu, 4 Jul 2019 14:15:05 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 598B1934B6; Thu, 4 Jul 2019 14:15:05 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 3D916240F0; Thu, 4 Jul 2019 14:15:05 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x64EF5rd057350; Thu, 4 Jul 2019 14:15:05 GMT (envelope-from imp@FreeBSD.org) Received: (from imp@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x64EF404057347; Thu, 4 Jul 2019 14:15:04 GMT (envelope-from imp@FreeBSD.org) Message-Id: <201907041415.x64EF404057347@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: imp set sender to imp@FreeBSD.org using -f From: Warner Losh Date: Thu, 4 Jul 2019 14:15:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r349728 - in head/sys: arm/amlogic/aml8726 dev/mmc/host mips/ingenic X-SVN-Group: head X-SVN-Commit-Author: imp X-SVN-Commit-Paths: in head/sys: arm/amlogic/aml8726 dev/mmc/host mips/ingenic X-SVN-Commit-Revision: 349728 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 598B1934B6 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.97 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; NEURAL_HAM_SHORT(-0.97)[-0.972,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2019 14:15:05 -0000 Author: imp Date: Thu Jul 4 14:15:04 2019 New Revision: 349728 URL: https://svnweb.freebsd.org/changeset/base/349728 Log: Implement missing MMCBR ivars All MMCBR bridges have to implement all the MMCBR variables. This implements them for everybody that currently doesn't. A common routine for this should be written. Modified: head/sys/arm/amlogic/aml8726/aml8726_mmc.c head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c head/sys/dev/mmc/host/dwmmc.c head/sys/mips/ingenic/jz4780_mmc.c Modified: head/sys/arm/amlogic/aml8726/aml8726_mmc.c ============================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_mmc.c Thu Jul 4 14:04:08 2019 (r349727) +++ head/sys/arm/amlogic/aml8726/aml8726_mmc.c Thu Jul 4 14:15:04 2019 (r349728) @@ -965,15 +965,26 @@ aml8726_mmc_read_ivar(device_t bus, device_t child, case MMCBR_IVAR_POWER_MODE: *(int *)result = sc->host.ios.power_mode; break; + case MMCBR_IVAR_RETUNE_REQ: + *(int *)result = return_req_none; case MMCBR_IVAR_VDD: *(int *)result = sc->host.ios.vdd; break; + case MMCBR_IVAR_VCCQ: + *result = sc->sc_host.ios.vccq; + break; case MMCBR_IVAR_CAPS: *(int *)result = sc->host.caps; break; + case MMCBR_IVAR_TIMING: + *(int *)result = sc->sc_host.ios.timing; + break; case MMCBR_IVAR_MAX_DATA: *(int *)result = AML_MMC_MAX_DMA / MMC_SECTOR_SIZE; break; + case MMCBR_IVAR_MAX_BUSY_TIMEOUT: + *(int *)result = 1000000; /* 1s max */ + break; default: return (EINVAL); } @@ -1011,6 +1022,12 @@ aml8726_mmc_write_ivar(device_t bus, device_t child, break; case MMCBR_IVAR_VDD: sc->host.ios.vdd = value; + break; + case MMCBR_IVAR_VCCQ: + sc->sc_host.ios.vccq = value; + break; + case MMCBR_IVAR_TIMING: + sc->sc_host.ios.timing = value; break; /* These are read-only */ case MMCBR_IVAR_CAPS: Modified: head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c ============================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c Thu Jul 4 14:04:08 2019 (r349727) +++ head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c Thu Jul 4 14:15:04 2019 (r349728) @@ -1245,15 +1245,27 @@ aml8726_sdxc_read_ivar(device_t bus, device_t child, case MMCBR_IVAR_POWER_MODE: *(int *)result = sc->host.ios.power_mode; break; + case MMCBR_IVAR_RETUNE_REQ: + *(int *)result = return_req_none; + break; case MMCBR_IVAR_VDD: *(int *)result = sc->host.ios.vdd; break; + case MMCBR_IVAR_VCCQ: + *result = sc->host.ios.vccq; + break; case MMCBR_IVAR_CAPS: *(int *)result = sc->host.caps; break; + case MMCBR_IVAR_TIMING: + *(int *)result = sc->host.ios.timing; + break; case MMCBR_IVAR_MAX_DATA: *(int *)result = AML_SDXC_MAX_DMA / MMC_SECTOR_SIZE; break; + case MMCBR_IVAR_MAX_BUSY_TIMEOUT: + *(int *)result = 1000000; /* 1s max */ + break; default: return (EINVAL); } @@ -1291,6 +1303,12 @@ aml8726_sdxc_write_ivar(device_t bus, device_t child, break; case MMCBR_IVAR_VDD: sc->host.ios.vdd = value; + break; + case MMCBR_IVAR_VCCQ: + sc->host.ios.vccq = value; + break; + case MMCBR_IVAR_TIMING: + sc->host.ios.timing = value; break; /* These are read-only */ case MMCBR_IVAR_CAPS: Modified: head/sys/dev/mmc/host/dwmmc.c ============================================================================== --- head/sys/dev/mmc/host/dwmmc.c Thu Jul 4 14:04:08 2019 (r349727) +++ head/sys/dev/mmc/host/dwmmc.c Thu Jul 4 14:15:04 2019 (r349728) @@ -1091,6 +1091,9 @@ dwmmc_read_ivar(device_t bus, device_t child, int whic case MMCBR_IVAR_VDD: *(int *)result = sc->host.ios.vdd; break; + case MMCBR_IVAR_VCCQ: + *(int *)result = sc->host.ios.vccq; + break; case MMCBR_IVAR_CAPS: *(int *)result = sc->host.caps; break; @@ -1141,10 +1144,8 @@ dwmmc_write_ivar(device_t bus, device_t child, int whi case MMCBR_IVAR_TIMING: sc->host.ios.timing = value; break; - - /* Not handled */ case MMCBR_IVAR_VCCQ: - return (0); + sc->sc_host.ios.vccq = value; break; /* These are read-only */ case MMCBR_IVAR_CAPS: Modified: head/sys/mips/ingenic/jz4780_mmc.c ============================================================================== --- head/sys/mips/ingenic/jz4780_mmc.c Thu Jul 4 14:04:08 2019 (r349727) +++ head/sys/mips/ingenic/jz4780_mmc.c Thu Jul 4 14:15:04 2019 (r349728) @@ -774,17 +774,26 @@ jz4780_mmc_read_ivar(device_t bus, device_t child, int case MMCBR_IVAR_POWER_MODE: *(int *)result = sc->sc_host.ios.power_mode; break; + case MMCBR_IVAR_RETUNE_REQ: + *(int *)result = return_req_none; + break; case MMCBR_IVAR_VDD: *(int *)result = sc->sc_host.ios.vdd; break; + case MMCBR_IVAR_VCCQ: + *result = sc->sc_host.ios.vccq; + break; case MMCBR_IVAR_CAPS: *(int *)result = sc->sc_host.caps; break; + case MMCBR_IVAR_TIMING: + *(int *)result = sc->sc_host.ios.timing; + break; case MMCBR_IVAR_MAX_DATA: *(int *)result = 65535; break; - case MMCBR_IVAR_TIMING: - *(int *)result = sc->sc_host.ios.timing; + case MMCBR_IVAR_MAX_BUSY_TIMEOUT: + *(int *)result = 1000000; /* 1s max */ break; } @@ -824,6 +833,9 @@ jz4780_mmc_write_ivar(device_t bus, device_t child, in break; case MMCBR_IVAR_VDD: sc->sc_host.ios.vdd = value; + break; + case MMCBR_IVAR_VCCQ: + sc->sc_host.ios.vccq = value; break; case MMCBR_IVAR_TIMING: sc->sc_host.ios.timing = value;