From owner-svn-src-all@FreeBSD.ORG Sat Aug 28 07:10:52 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1EE43106566C; Sat, 28 Aug 2010 07:10:52 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 0DC028FC08; Sat, 28 Aug 2010 07:10:52 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o7S7Ap8J022228; Sat, 28 Aug 2010 07:10:51 GMT (envelope-from mav@svn.freebsd.org) Received: (from mav@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o7S7ApTC022225; Sat, 28 Aug 2010 07:10:51 GMT (envelope-from mav@svn.freebsd.org) Message-Id: <201008280710.o7S7ApTC022225@svn.freebsd.org> From: Alexander Motin Date: Sat, 28 Aug 2010 07:10:51 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r211920 - in head/sys/dev/ata: . chipsets X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 28 Aug 2010 07:10:52 -0000 Author: mav Date: Sat Aug 28 07:10:51 2010 New Revision: 211920 URL: http://svn.freebsd.org/changeset/base/211920 Log: Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers. Submitted by: jfv@ MFC after: 1 week Modified: head/sys/dev/ata/ata-pci.h head/sys/dev/ata/chipsets/ata-intel.c Modified: head/sys/dev/ata/ata-pci.h ============================================================================== --- head/sys/dev/ata/ata-pci.h Sat Aug 28 06:33:01 2010 (r211919) +++ head/sys/dev/ata/ata-pci.h Sat Aug 28 07:10:51 2010 (r211920) @@ -204,6 +204,29 @@ struct ata_pci_controller { #define ATA_I82801JI_AH 0x3a228086 #define ATA_I82801JI_R1 0x3a258086 #define ATA_I82801JI_S2 0x3a268086 + +#define ATA_5Series_S1 0x3b208086 +#define ATA_5Series_S2 0x3b218086 +#define ATA_5Series_AH1 0x3b228086 +#define ATA_5Series_AH2 0x3b238086 +#define ATA_5Series_R1 0x3b258086 +#define ATA_5Series_S3 0x3b268086 +#define ATA_5Series_S4 0x3b288086 +#define ATA_5Series_AH3 0x3b298086 +#define ATA_5Series_R2 0x3b2c8086 +#define ATA_5Series_S5 0x3b2d8086 +#define ATA_5Series_S6 0x3b2e8086 +#define ATA_5Series_AH4 0x3b2f8086 + +#define ATA_CPT_S1 0x1c008086 +#define ATA_CPT_S2 0x1c018086 +#define ATA_CPT_AH1 0x1c028086 +#define ATA_CPT_AH2 0x1c038086 +#define ATA_CPT_R1 0x1c048086 +#define ATA_CPT_R2 0x1c058086 +#define ATA_CPT_S3 0x1c088086 +#define ATA_CPT_S4 0x1c098086 + #define ATA_I31244 0x32008086 #define ATA_ISCH 0x811a8086 Modified: head/sys/dev/ata/chipsets/ata-intel.c ============================================================================== --- head/sys/dev/ata/chipsets/ata-intel.c Sat Aug 28 06:33:01 2010 (r211919) +++ head/sys/dev/ata/chipsets/ata-intel.c Sat Aug 28 07:10:51 2010 (r211920) @@ -140,22 +140,26 @@ ata_intel_probe(device_t dev) { ATA_I82801JI_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JI_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JI_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, - { 0x3b208086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b218086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b228086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b238086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b248086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b258086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b268086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b278086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b288086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b298086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2a8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2b8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2c8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2d8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2e8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, - { 0x3b2f8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" }, + { ATA_5Series_S1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_S2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_R1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_S3, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_S4, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_AH3, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_R2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_S5, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_S6, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_5Series_AH4, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" }, + { ATA_CPT_S1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_S2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_S3, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, + { ATA_CPT_S4, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" }, { ATA_I31244, 0, 0, 2, ATA_SA150, "31244" }, { ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" }, { 0, 0, 0, 0, 0, 0}};