From owner-cvs-sys Mon Jul 28 22:27:55 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id WAA10549 for cvs-sys-outgoing; Mon, 28 Jul 1997 22:27:55 -0700 (PDT) Received: from freefall.freebsd.org (freefall.FreeBSD.ORG [204.216.27.21]) by hub.freebsd.org (8.8.5/8.8.5) with ESMTP id WAA10384; Mon, 28 Jul 1997 22:25:27 -0700 (PDT) From: Michael Smith Received: (from msmith@localhost) by freefall.freebsd.org (8.8.6/8.8.5) id WAA07190; Mon, 28 Jul 1997 22:24:38 -0700 (PDT) Date: Mon, 28 Jul 1997 22:24:38 -0700 (PDT) Message-Id: <199707290524.WAA07190@freefall.freebsd.org> To: cvs-committers@FreeBSD.ORG, cvs-all@FreeBSD.ORG, cvs-sys@FreeBSD.ORG Subject: cvs commit: src/sys/i386/isa isa.c Sender: owner-cvs-sys@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk msmith 1997/07/28 22:24:37 PDT Modified files: sys/i386/isa isa.c Log: Return to using disable/enable_intr() for guarding DMA register access. Mask the read value from the count register in order to return zero correctly after TC, as per intel datasheet : "If it is not autoinitialised, this register will have a count of FFFFH after TC" Revision Changes Path 1.99 +10 -7 src/sys/i386/isa/isa.c