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Date:      Sun, 27 Sep 1998 07:14:48 -0600 (MDT)
From:      "Justin T. Gibbs" <gibbs@narnia.plutotech.com>
To:        freebsd@magnet.geophysik.tu-freiberg.de
Cc:        scsi@FreeBSD.ORG
Subject:   Re: AHA 2742T+CAM+SMP problems 2nd. try #3
Message-ID:  <199809271314.HAA11614@narnia.plutotech.com>
In-Reply-To: <199809271114.NAA09487@magnet.geophysik.tu-freiberg.de>

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In article <199809271114.NAA09487@magnet.geophysik.tu-freiberg.de> you wrote:
> Hi,
> 
> I've again upgraded my kernel sources (cvs-cur.4680)
> and the panic from the previous version is gone now
> (since cam_xpt.c v.1.14)

Can you move this to the SMP list then?  This is not a CAM
problem.

> (noperiph:ahc0:0:X:X): SCSI bus reset delivered. 0 SCBs aborted.
> (noperiph:ahc0:1:X:X): SCSI bus reset delivered. 0 SCBs aborted.
> SMP: AP CPU #1 Launched!
> SMP: CPU1 apic_initialize():
>      lint0: 0x00010700 lint1: 0x00010400 TPR: 0x00000010 SVR: 0x000001ff
> ahc0: Selection Timeout on A:1. 1 SCBs aborted
> ahc0: Selection Timeout on A:3. 1 SCBs aborted
> ahc0: Selection Timeout on A:5. 1 SCBs aborted
> ahc0: Selection Timeout on A:6. 1 SCBs aborted
> ahc0: Selection Timeout on B:0. 1 SCBs aborted
> ahc0: Selection Timeout on B:1. 1 SCBs aborted
> 
> It is impossible that the AHA2742 generates no interrupts,
> because the panic message from the previous post came from
> within _ahc_intr().

Okay, let me rephrase that.  The 2742 is able to generate interrupts
until a little time after the second CPU is launched.  The panic you
saw yesturday actually occured well before the second CPU was launched.

>         /*
>          * See if we have a Rev E or higher aic7770. Anything below a
>          * Rev E will have a R/O autoflush disable configuration bit.
>          */

This has nothing to do with interrupt delivery.

--
Justin

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