Date: Sun, 20 Sep 2015 14:28:07 +0000 (UTC) From: Luiz Otavio O Souza <loos@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r288024 - head/sys/dev/dwc Message-ID: <201509201428.t8KES7ag027885@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: loos Date: Sun Sep 20 14:28:06 2015 New Revision: 288024 URL: https://svnweb.freebsd.org/changeset/base/288024 Log: Fix the build by adding the alternate descriptors and MII clock defines. This obviously should be in the last commit. Modified: head/sys/dev/dwc/if_dwc.h Modified: head/sys/dev/dwc/if_dwc.h ============================================================================== --- head/sys/dev/dwc/if_dwc.h Sun Sep 20 14:13:29 2015 (r288023) +++ head/sys/dev/dwc/if_dwc.h Sun Sep 20 14:28:06 2015 (r288024) @@ -34,6 +34,9 @@ * Register names were taken almost as is from the documentation. */ +#ifndef __IF_DWC_H__ +#define __IF_DWC_H__ + #define MAC_CONFIGURATION 0x0 #define CONF_JD (1 << 22) /* jabber timer disable */ #define CONF_BE (1 << 21) /* Frame Burst Enable */ @@ -207,6 +210,12 @@ /* DMA */ #define BUS_MODE 0x1000 #define BUS_MODE_EIGHTXPBL (1 << 24) /* Multiplies PBL by 8 */ +#define BUS_MODE_FIXEDBURST (1 << 16) +#define BUS_MODE_PRIORXTX_SHIFT 14 +#define BUS_MODE_PRIORXTX_41 3 +#define BUS_MODE_PRIORXTX_31 2 +#define BUS_MODE_PRIORXTX_21 1 +#define BUS_MODE_PRIORXTX_11 0 #define BUS_MODE_PBL_SHIFT 8 /* Single block transfer size */ #define BUS_MODE_PBL_BEATS_8 8 #define BUS_MODE_SWR (1 << 0) /* Reset */ @@ -260,3 +269,22 @@ #define CURRENT_HOST_TRANSMIT_BUF_ADDR 0x1050 #define CURRENT_HOST_RECEIVE_BUF_ADDR 0x1054 #define HW_FEATURE 0x1058 + +#define DWC_GMAC 0x1 +#define DWC_GMAC_ALT_DESC 0x2 +#define GMAC_MII_CLK_60_100M_DIV42 0x0 +#define GMAC_MII_CLK_100_150M_DIV62 0x1 +#define GMAC_MII_CLK_25_35M_DIV16 0x2 +#define GMAC_MII_CLK_35_60M_DIV26 0x3 +#define GMAC_MII_CLK_150_250M_DIV102 0x4 +#define GMAC_MII_CLK_250_300M_DIV124 0x5 +#define GMAC_MII_CLK_DIV4 0x8 +#define GMAC_MII_CLK_DIV6 0x9 +#define GMAC_MII_CLK_DIV8 0xa +#define GMAC_MII_CLK_DIV10 0xb +#define GMAC_MII_CLK_DIV12 0xc +#define GMAC_MII_CLK_DIV14 0xd +#define GMAC_MII_CLK_DIV16 0xe +#define GMAC_MII_CLK_DIV18 0xf + +#endif /* __IF_DWC_H__ */
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201509201428.t8KES7ag027885>