From owner-svn-src-all@FreeBSD.ORG Mon Jul 2 21:11:02 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 01557106566B; Mon, 2 Jul 2012 21:11:02 +0000 (UTC) (envelope-from marcel@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E1FA78FC12; Mon, 2 Jul 2012 21:11:01 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q62LB1QH099755; Mon, 2 Jul 2012 21:11:01 GMT (envelope-from marcel@svn.freebsd.org) Received: (from marcel@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q62LB1HK099753; Mon, 2 Jul 2012 21:11:01 GMT (envelope-from marcel@svn.freebsd.org) Message-Id: <201207022111.q62LB1HK099753@svn.freebsd.org> From: Marcel Moolenaar Date: Mon, 2 Jul 2012 21:11:01 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r238030 - head/sys/powerpc/booke X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Jul 2012 21:11:02 -0000 Author: marcel Date: Mon Jul 2 21:11:01 2012 New Revision: 238030 URL: http://svn.freebsd.org/changeset/base/238030 Log: Implement cpu_flush_dcache(). This allows us to optimize __syncicache() for the common case in chich D-caches are coherent by virtue of busdma. Modified: head/sys/powerpc/booke/machdep.c Modified: head/sys/powerpc/booke/machdep.c ============================================================================== --- head/sys/powerpc/booke/machdep.c Mon Jul 2 21:01:03 2012 (r238029) +++ head/sys/powerpc/booke/machdep.c Mon Jul 2 21:11:01 2012 (r238030) @@ -473,7 +473,24 @@ cpu_pcpu_init(struct pcpu *pcpu, int cpu void cpu_flush_dcache(void *ptr, size_t len) { - /* TBD */ + register_t addr, off; + + /* + * Align the address to a cacheline and adjust the length + * accordingly. Then round the length to a multiple of the + * cacheline for easy looping. + */ + addr = (uintptr_t)ptr; + off = addr & (cacheline_size - 1); + addr -= off; + len = (len + off + cacheline_size - 1) & ~(cacheline_size - 1); + + while (len > 0) { + __asm __volatile ("dcbf 0,%0" :: "r"(addr)); + __asm __volatile ("sync"); + addr += cacheline_size; + len -= cacheline_size; + } } void