From owner-svn-src-all@freebsd.org Sat Nov 28 12:11:46 2015 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 85B22A3AC66; Sat, 28 Nov 2015 12:11:46 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 36DA41AB6; Sat, 28 Nov 2015 12:11:46 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id tASCBjbH043379; Sat, 28 Nov 2015 12:11:45 GMT (envelope-from mmel@FreeBSD.org) Received: (from mmel@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id tASCBjs3043376; Sat, 28 Nov 2015 12:11:45 GMT (envelope-from mmel@FreeBSD.org) Message-Id: <201511281211.tASCBjs3043376@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mmel set sender to mmel@FreeBSD.org using -f From: Michal Meloun Date: Sat, 28 Nov 2015 12:11:45 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r291425 - in head/sys/arm: arm include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 28 Nov 2015 12:11:46 -0000 Author: mmel Date: Sat Nov 28 12:11:44 2015 New Revision: 291425 URL: https://svnweb.freebsd.org/changeset/base/291425 Log: ARM: Add support for new KRAIT 300 CPU revision. Approved by: kib (mentor) Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/identcpu.c head/sys/arm/include/armreg.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Sat Nov 28 12:09:36 2015 (r291424) +++ head/sys/arm/arm/cpufunc.c Sat Nov 28 12:11:44 2015 (r291425) @@ -910,7 +910,8 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA15R1 || cputype == CPU_ID_CORTEXA15R2 || cputype == CPU_ID_CORTEXA15R3 || - cputype == CPU_ID_KRAIT ) { + cputype == CPU_ID_KRAIT300R0 || + cputype == CPU_ID_KRAIT300R1 ) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ get_cachetype_cp15(); Modified: head/sys/arm/arm/identcpu.c ============================================================================== --- head/sys/arm/arm/identcpu.c Sat Nov 28 12:09:36 2015 (r291424) +++ head/sys/arm/arm/identcpu.c Sat Nov 28 12:11:44 2015 (r291425) @@ -197,7 +197,9 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA15R3, CPU_CLASS_CORTEXA, "Cortex A15-r3", generic_steppings }, - { CPU_ID_KRAIT, CPU_CLASS_KRAIT, "Krait", + { CPU_ID_KRAIT300R0, CPU_CLASS_KRAIT, "Krait 300-r0", + generic_steppings }, + { CPU_ID_KRAIT300R1, CPU_CLASS_KRAIT, "Krait 300-r1", generic_steppings }, { CPU_ID_80200, CPU_CLASS_XSCALE, "i80200", Modified: head/sys/arm/include/armreg.h ============================================================================== --- head/sys/arm/include/armreg.h Sat Nov 28 12:09:36 2015 (r291424) +++ head/sys/arm/include/armreg.h Sat Nov 28 12:11:44 2015 (r291425) @@ -139,7 +139,9 @@ #define CPU_ID_CORTEXA15R1 0x411fc0f0 #define CPU_ID_CORTEXA15R2 0x412fc0f0 #define CPU_ID_CORTEXA15R3 0x413fc0f0 -#define CPU_ID_KRAIT 0x510f06f0 /* Snapdragon S4 Pro/APQ8064 */ +#define CPU_ID_KRAIT300R0 0x510f06f0 /* Snapdragon S4 Pro/APQ8064 */ +#define CPU_ID_KRAIT300R1 0x511f06f0 + #define CPU_ID_TI925T 0x54029250 #define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */ #define CPU_ID_MV88FR331 0x56153310 /* Marvell Feroceon 88FR331 Core */