Date: Wed, 1 Jul 2009 20:28:10 -0700 (PDT) From: Neelkanth Natu <neelnatu@yahoo.com> To: "M. Warner Losh" <imp@bsdimp.com> Cc: freebsd-mips@freebsd.org Subject: Re: Machine Check exception during bootup Message-ID: <646809.32414.qm@web34401.mail.mud.yahoo.com>
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Hi Warner,
Thanks for reviewing the diff.
I have made the changes you suggested in the review. The new diffs are
at the end of this email.
- No need to have redefine PAGE_SIZE in tlb.S. I am now generating
this macro via genassym.c
- Remove the offset 0x0fff0000 used when invalidating tlb entries. I have
tested this on MALTA as well as SWARM and it seems to work fine.
best
Neel
==== //depot/user/neelnatu/freebsd_sibyte/src/sys/mips/mips/genassym.c#1 - /amd/svlusr02.eng.netapp.com/vol/home24/neelnatu/p4/freebsd_sibyte/src/sys/mips/mips/genassym.c ====
93a94
> ASSYM(PAGE_SHIFT, PAGE_SHIFT);
==== //depot/user/neelnatu/freebsd_sibyte/src/sys/mips/mips/tlb.S#1 - /amd/svlusr02.eng.netapp.com/vol/home24/neelnatu/p4/freebsd_sibyte/src/sys/mips/mips/tlb.S ====
84d83
< #define PAGE_SHIFT 34
91d89
< #define PAGE_SHIFT 2
235d232
< li v0, MIPS_KSEG3_START + 0x0fff0000 # invalid address
238d234
< _MTC0 v0, COP_0_TLB_HI # Mark entry high as invalid
241a238,247
>
> #
> # Load invalid entry, each TLB entry should have it's own bogus
> # address calculated by following expression:
> # MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
> # One bogus value for every TLB entry might cause MCHECK exception
> #
> sll t3, t1, PAGE_SHIFT + 1
> li v0, MIPS_KSEG0_START # invalid address
> addu v0, t3
248c254
< _MTC0 t0, COP_0_TLB_HI # Restore the PID
---
> _MTC0 v0, COP_0_TLB_HI # Mark entry high as invalid
250c256
< addu t0, t0, 8 * 1024
---
> addu v0, v0, 8 * 1024
292c298
< li t1, MIPS_KSEG0_START + 0x0fff0000
---
> li t1, MIPS_KSEG0_START
297c303
< # MIPS_KSEG0_START + 0x0fff0000 + 2 * i * PAGE_SIZE;
---
> # MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
476c482,492
< li v0, MIPS_KSEG0_START + 0x0fff0000 # invalid address
---
>
> #
> # Load invalid entry, each TLB entry should have it's own bogus
> # address calculated by following expression:
> # MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
> # One bogus value for every TLB entry might cause MCHECK exception
> #
> sll t3, t1, PAGE_SHIFT + 1
> li v0, MIPS_KSEG0_START # invalid address
> addu v0, t3
>
==== //depot/user/neelnatu/freebsd_sibyte/src/sys/mips/mips/swtch.S#1 - /amd/svlusr02.eng.netapp.com/vol/home24/neelnatu/p4/freebsd_sibyte/src/sys/mips/mips/swtch.S ====
84d83
< #define PAGE_SHIFT 34
91d89
< #define PAGE_SHIFT 2
364c362
< li t1, MIPS_KSEG0_START + 0x0fff0000 # invalidate tlb entry
---
> li t1, MIPS_KSEG0_START # invalidate tlb entry
--- On Wed, 7/1/09, M. Warner Losh <imp@bsdimp.com> wrote:
> From: M. Warner Losh <imp@bsdimp.com>
> Subject: Re: Machine Check exception during bootup
> To: neelnatu@yahoo.com
> Cc: freebsd-mips@freebsd.org
> Date: Wednesday, July 1, 2009, 7:39 AM
> In message: <14584.70267.qm@web34403.mail.mud.yahoo.com>
> Neelkanth Natu
> <neelnatu@yahoo.com>
> writes:
> :
> r02.eng.netapp.com/vol/home24/neelnatu/p4/freebsd_sibyte/src/sys/mips/mips/tlb.S
> ====
> : @@ -81,14 +81,14 @@
> : #define _MFC0
> dmfc0
> : #define _MTC0
> dmtc0
> : #define WIRED_SHIFT 34
> : -#define PAGE_SHIFT 34
> : +#define PAGE_SHIFT 12
> : #else
> : #define _SLL sll
> : #define _SRL
> srl
> : #define _MFC0
> mfc0
> : #define _MTC0
> mtc0
> : #define WIRED_SHIFT 2
> : -#define PAGE_SHIFT 2
> : +#define PAGE_SHIFT 12
> : #endif
>
> These are wrong. PAGE_SHIFT is supposed to be the bit
> position in the
> TLB, not the size of the page for multiplication. At
> least in thoery,
> but looking at the manual doesn't even bear that out...
>
> However, it appears it isn't used that way at all in the
> rest of the
> code. This means we should move it outside of the
> #ifdef, since it
> has nothing to do with ISA we're compiling for.
>
> : .set
> noreorder
> # Noreorder is default style!
> : #if defined(ISA_MIPS32)
> : @@ -232,22 +232,30 @@
> : mtc0 zero,
> COP_0_STATUS_REG #
> Disable interrupts
> : ITLBNOPFIX
> : mfc0 t1,
> COP_0_TLB_WIRED
> : - li v0,
> MIPS_KSEG3_START + 0x0fff0000 # invalid address
> : _MFC0 t0,
> COP_0_TLB_HI # Save the
> PID
> :
> : - _MTC0 v0,
> COP_0_TLB_HI # Mark
> entry high as invalid
> : _MTC0 zero,
> COP_0_TLB_LO0 # Zero
> out low entry0.
> : _MTC0 zero,
> COP_0_TLB_LO1 # Zero
> out low entry1.
> : mtc0 zero,
> COP_0_TLB_PG_MASK # Zero out mask entry.
> : +
> : + #
> : + # Load invalid entry, each TLB entry
> should have it's own bogus
> : + # address calculated by following
> expression:
> : + # MIPS_KSEG0_START + 0x0fff0000 + 2 *
> i * PAGE_SIZE;
> : + # One bogus value for every TLB entry
> might cause MCHECK exception
> : + #
> : + sll t3, t1,
> PAGE_SHIFT + 1
> : + li v0,
> MIPS_KSEG0_START + 0x0fff0000 # invalid
> address
> : + addu v0, t3
>
> I'll note that NetBSD doesn't add the 0x0fff0000 on the end
> here. I
> don't understand why we do it, even though I likely added
> this to the
> port. Does it work without it?
>
> Warner
>
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