From owner-freebsd-hackers@FreeBSD.ORG Sat Aug 27 01:25:08 2011 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 161A91065670 for ; Sat, 27 Aug 2011 01:25:08 +0000 (UTC) (envelope-from hilfialkaff@gmail.com) Received: from mail-fx0-f54.google.com (mail-fx0-f54.google.com [209.85.161.54]) by mx1.freebsd.org (Postfix) with ESMTP id 9E1988FC15 for ; Sat, 27 Aug 2011 01:25:07 +0000 (UTC) Received: by fxe4 with SMTP id 4so3849891fxe.13 for ; Fri, 26 Aug 2011 18:25:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; bh=AIQdFC40JeCYXDmBeK9sSU/LmRePCdf1X+r6qpljqfw=; b=Gdu+Nyj7EAZfLrEMtDALAFY6ENZBLYtQssX4Dozh/6Zw4TEcv1QRtSdCmFmJCGP8ei NbAKMXGBczx9scOJsG9y04IRFsdMGGb4GLAU634ZYtuL1MWcnBY13fW/JnthdVdyA/wf c241KzweUj7cgZ373K30zIrn2bt5lREpxKs1A= MIME-Version: 1.0 Received: by 10.223.43.23 with SMTP id u23mr2617198fae.82.1314406954829; Fri, 26 Aug 2011 18:02:34 -0700 (PDT) Received: by 10.223.101.132 with HTTP; Fri, 26 Aug 2011 18:02:34 -0700 (PDT) Date: Fri, 26 Aug 2011 18:02:34 -0700 Message-ID: From: hilfi alkaff To: freebsd-hackers@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Subject: pcie initialization with acpi X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 27 Aug 2011 01:25:08 -0000 Hi, I would like to learn more of the above matter. After the MCFG table gets discovered with acpi, what does the address given by the ACPI_MCFG_ALLOCATION* tells you? Does that tell you the address of the extended configuration space of pci express? Also, is BSD distinguishing between reading from pcie config & pci config? Because there's this pciereg_cfgread() function that seem to do that. I thought pcie config space is just at the offset of 0x100 from pci config space? -- Thanks in advance, ~Hilfi Alkaff~