From owner-svn-src-all@freebsd.org Thu Jul 4 17:22:47 2019 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 3FF6A15D9F5B; Thu, 4 Jul 2019 17:22:47 +0000 (UTC) (envelope-from mhorne063@gmail.com) Received: from mail-ot1-x32c.google.com (mail-ot1-x32c.google.com [IPv6:2607:f8b0:4864:20::32c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "smtp.gmail.com", Issuer "GTS CA 1O1" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 8F5E36A2CE; Thu, 4 Jul 2019 17:22:46 +0000 (UTC) (envelope-from mhorne063@gmail.com) Received: by mail-ot1-x32c.google.com with SMTP id s20so6606689otp.4; Thu, 04 Jul 2019 10:22:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=o4E9Kic7oKDNGUO+2oyNLGgSLhGHanHUmtiPWvA8rEI=; b=kCk/OjsWu6sWo13uxx+Q67ES5jsKyysPBdsblSBxgMCGRXGedGcigkoCZY5Kpz81Ii 6jRX/5DkDtczjOmg3kBWAC5q9TwR/Q68pVp6R3x5ZoO1s4X+6D7+Apf8vmyZYDofXGJx +1QpCTD5nTkio50xWNoaeTMwtogo5yDRzF252LnvRXYxvWAaYioCtty+P107Ts4Ug9ge WZC9hcX5vlk6bLecmtoF5Gfcp+bNuw6kkHChXzZIL4cbXU9Ij4+j6iZzuxrd8C5X9WkR EcJwODutj69km6JCclO0QRb078ozNNnLNEd6g12y8MUIrLidixQ3TOfSYXxhBb9vc4Iq vR3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=o4E9Kic7oKDNGUO+2oyNLGgSLhGHanHUmtiPWvA8rEI=; b=qWQGSxjL1toOP03pgMhI3WbS68KEP9kMSV1xQB/2txmnrkL9vI9GZrUSTqC1VzQhHr eyEukCp9Q0rbV1A589nwDbxUAzmZNLzfD1Y+CG3vZTJABMeq/O7546blNAF3AmrHKh6e kg6MUHlUlLcgOc6ZndOoXxbvCz4v34ssP4LG/PJxXwrTSzCUcrUG15Y95h+YGo/gY0dS tnPMavGULMUJT/WMtowNuvMk/A9vgR10JZMQtTSvBmLe8dExI+kQdYdmsJ/CCO7iQ/v+ FuCtzFJ7OuYffRXmXY0LqW/VPUvXPq4nhrKPIcl8GV9HwoyCa/xLMCfoaFi1rtjHTujO VQaA== X-Gm-Message-State: APjAAAXuk+fQzLXvlzy8OqrRLmg2nQyKN8SCfZzwskxLU4yRa5Wdjkcd 0jdbm5ZJ9G0z8MbM3iY6koJYy9+2EvWiW08U+PM6eLNg X-Google-Smtp-Source: APXvYqwvhFz4LpOYp1vUViz1E2T1McHF5ht6qAstdMaKFLbGJeHla6zoNB9RIBc74zfCOJp/AWo52W3LkaY1XMpT6Cw= X-Received: by 2002:a05:6830:144e:: with SMTP id w14mr33005487otp.10.1562260965345; Thu, 04 Jul 2019 10:22:45 -0700 (PDT) MIME-Version: 1.0 References: <201907041717.x64HH1de053121@repo.freebsd.org> In-Reply-To: <201907041717.x64HH1de053121@repo.freebsd.org> From: Mitchell Horne Date: Thu, 4 Jul 2019 13:22:33 -0400 Message-ID: Subject: Re: svn commit: r349736 - in stable/12/contrib/elftoolchain: common readelf To: Mitchell Horne Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Content-Type: text/plain; charset="UTF-8" X-Rspamd-Queue-Id: 8F5E36A2CE X-Spamd-Bar: ------ Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-6.96 / 15.00]; NEURAL_HAM_MEDIUM(-1.00)[-0.997,0]; NEURAL_HAM_SHORT(-0.96)[-0.964,0]; REPLY(-4.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000,0] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2019 17:22:47 -0000 On Thu, Jul 4, 2019 at 1:17 PM Mitchell Horne wrote: > > Author: mhorne > Date: Thu Jul 4 17:17:00 2019 > New Revision: 349736 > URL: https://svnweb.freebsd.org/changeset/base/349736 > > Log: > MFC r349482,r349563: Apologies, this should read r349482,r349562. The svn mergeinfo is correct however. > readelf: Add support for RISC-V specific e_flags > > Approved by: markj (mentor, implicit) > > Modified: > stable/12/contrib/elftoolchain/common/elfdefinitions.h > stable/12/contrib/elftoolchain/readelf/readelf.c > Directory Properties: > stable/12/ (props changed) > > Modified: stable/12/contrib/elftoolchain/common/elfdefinitions.h > ============================================================================== > --- stable/12/contrib/elftoolchain/common/elfdefinitions.h Thu Jul 4 17:15:36 2019 (r349735) > +++ stable/12/contrib/elftoolchain/common/elfdefinitions.h Thu Jul 4 17:17:00 2019 (r349736) > @@ -33,7 +33,7 @@ > * See: http://www.sco.com/developers/gabi/latest/ch4.intro.html > * - The May 1998 (version 1.5) draft of "The ELF-64 object format". > * - Processor-specific ELF ABI definitions for sparc, i386, amd64, mips, > - * ia64, and powerpc processors. > + * ia64, powerpc, and RISC-V processors. > * - The "Linkers and Libraries Guide", from Sun Microsystems. > */ > > @@ -426,6 +426,22 @@ _ELF_DEFINE_EF(EF_PPC_RELOCATABLE, 0x00010000UL, \ > "-mrelocatable flag") \ > _ELF_DEFINE_EF(EF_PPC_RELOCATABLE_LIB, 0x00008000UL, \ > "-mrelocatable-lib flag") \ > +_ELF_DEFINE_EF(EF_RISCV_RVC, 0x00000001UL, \ > + "Compressed instruction extension") \ > +_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_MASK, 0x00000006UL, \ > + "Floating point ABI") \ > +_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_SOFT, 0x00000000UL, \ > + "Software emulated floating point") \ > +_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_SINGLE, 0x00000002UL, \ > + "Single precision floating point") \ > +_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_DOUBLE, 0x00000004UL, \ > + "Double precision floating point") \ > +_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_QUAD, 0x00000006UL, \ > + "Quad precision floating point") \ > +_ELF_DEFINE_EF(EF_RISCV_RVE, 0x00000008UL, \ > + "RV32E embedded ABI") \ > +_ELF_DEFINE_EF(EF_RISCV_TSO, 0x00000010UL, \ > + "RVTSO memory consistency model") \ > _ELF_DEFINE_EF(EF_SPARC_EXT_MASK, 0x00ffff00UL, \ > "Vendor Extension mask") \ > _ELF_DEFINE_EF(EF_SPARC_32PLUS, 0x00000100UL, \ > > Modified: stable/12/contrib/elftoolchain/readelf/readelf.c > ============================================================================== > --- stable/12/contrib/elftoolchain/readelf/readelf.c Thu Jul 4 17:15:36 2019 (r349735) > +++ stable/12/contrib/elftoolchain/readelf/readelf.c Thu Jul 4 17:17:00 2019 (r349736) > @@ -420,6 +420,13 @@ static struct eflags_desc powerpc_eflags_desc[] = { > {0, NULL} > }; > > +static struct eflags_desc riscv_eflags_desc[] = { > + {EF_RISCV_RVC, "RVC"}, > + {EF_RISCV_RVE, "RVE"}, > + {EF_RISCV_TSO, "TSO"}, > + {0, NULL} > +}; > + > static struct eflags_desc sparc_eflags_desc[] = { > {EF_SPARC_32PLUS, "v8+"}, > {EF_SPARC_SUN_US1, "ultrasparcI"}, > @@ -2279,6 +2286,23 @@ dump_eflags(struct readelf *re, uint64_t e_flags) > case EM_PPC: > case EM_PPC64: > edesc = powerpc_eflags_desc; > + break; > + case EM_RISCV: > + switch (e_flags & EF_RISCV_FLOAT_ABI_MASK) { > + case EF_RISCV_FLOAT_ABI_SOFT: > + printf(", soft-float ABI"); > + break; > + case EF_RISCV_FLOAT_ABI_SINGLE: > + printf(", single-float ABI"); > + break; > + case EF_RISCV_FLOAT_ABI_DOUBLE: > + printf(", double-float ABI"); > + break; > + case EF_RISCV_FLOAT_ABI_QUAD: > + printf(", quad-float ABI"); > + break; > + } > + edesc = riscv_eflags_desc; > break; > case EM_SPARC: > case EM_SPARC32PLUS: >