From owner-svn-src-head@FreeBSD.ORG Sat Jul 6 04:18:35 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 87C18355; Sat, 6 Jul 2013 04:18:35 +0000 (UTC) (envelope-from rpaulo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 6085616A2; Sat, 6 Jul 2013 04:18:35 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r664IZGI010492; Sat, 6 Jul 2013 04:18:35 GMT (envelope-from rpaulo@svn.freebsd.org) Received: (from rpaulo@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r664IZTh010490; Sat, 6 Jul 2013 04:18:35 GMT (envelope-from rpaulo@svn.freebsd.org) Message-Id: <201307060418.r664IZTh010490@svn.freebsd.org> From: Rui Paulo Date: Sat, 6 Jul 2013 04:18:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r252863 - head/sys/arm/ti X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 04:18:35 -0000 Author: rpaulo Date: Sat Jul 6 04:18:34 2013 New Revision: 252863 URL: http://svnweb.freebsd.org/changeset/base/252863 Log: Don't clear the SYSCONFIG register on boot. This follows section 18.4.2.2 SD Soft Reset Flow in the TI AM335x Technical Reference Manual and seems to fix the "ti_mmchs0: Error: current cmd NULL, already done?" messages. Modified: head/sys/arm/ti/ti_mmchs.c head/sys/arm/ti/ti_mmchs.h Modified: head/sys/arm/ti/ti_mmchs.c ============================================================================== --- head/sys/arm/ti/ti_mmchs.c Sat Jul 6 04:13:47 2013 (r252862) +++ head/sys/arm/ti/ti_mmchs.c Sat Jul 6 04:18:34 2013 (r252863) @@ -1327,7 +1327,7 @@ ti_mmchs_hw_init(device_t dev) unsigned long timeout; uint32_t sysctl; uint32_t capa; - uint32_t con; + uint32_t con, sysconfig; /* 1: Enable the controller and interface/functional clocks */ clk = MMC0_CLK + sc->device_id; @@ -1344,7 +1344,9 @@ ti_mmchs_hw_init(device_t dev) } /* 2: Issue a softreset to the controller */ - ti_mmchs_write_4(sc, MMCHS_SYSCONFIG, 0x0002); + sysconfig = ti_mmchs_read_4(sc, MMCHS_SYSCONFIG); + sysconfig |= MMCHS_SYSCONFIG_SRST; + ti_mmchs_write_4(sc, MMCHS_SYSCONFIG, sysconfig); timeout = 100; while ((ti_mmchs_read_4(sc, MMCHS_SYSSTATUS) & 0x01) == 0x0) { DELAY(1000); Modified: head/sys/arm/ti/ti_mmchs.h ============================================================================== --- head/sys/arm/ti/ti_mmchs.h Sat Jul 6 04:13:47 2013 (r252862) +++ head/sys/arm/ti/ti_mmchs.h Sat Jul 6 04:18:34 2013 (r252863) @@ -67,6 +67,12 @@ #define AM335X_MMCHS_REG_OFFSET 0x100 /* Register bit settings */ +#define MMCHS_SYSCONFIG_CLK_FUN (2 << 8) +#define MMCHS_SYSCONFIG_CLK_IFC (1 << 8) +#define MMCHS_SYSCONFIG_SIDL (2 << 3) +#define MMCHS_SYSCONFIG_ENW (1 << 2) +#define MMCHS_SYSCONFIG_SRST (1 << 1) +#define MMCHS_SYSCONFIG_AIDL (1 << 0) #define MMCHS_STAT_BADA (1UL << 29) #define MMCHS_STAT_CERR (1UL << 28) #define MMCHS_STAT_ACE (1UL << 24)