From owner-svn-src-all@FreeBSD.ORG Tue Nov 25 16:06:20 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A7C34ED6; Tue, 25 Nov 2014 16:06:20 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 88F99ECA; Tue, 25 Nov 2014 16:06:20 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id sAPG6KUL038356; Tue, 25 Nov 2014 16:06:20 GMT (envelope-from br@FreeBSD.org) Received: (from br@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id sAPG6J6K038348; Tue, 25 Nov 2014 16:06:19 GMT (envelope-from br@FreeBSD.org) Message-Id: <201411251606.sAPG6J6K038348@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: br set sender to br@FreeBSD.org using -f From: Ruslan Bukin Date: Tue, 25 Nov 2014 16:06:19 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r275049 - in head/sys: arm/altera/socfpga boot/fdt/dts/arm dev/beri/virtio X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Nov 2014 16:06:20 -0000 Author: br Date: Tue Nov 25 16:06:19 2014 New Revision: 275049 URL: https://svnweb.freebsd.org/changeset/base/275049 Log: o Add PIO and vtblk mmio device info to the tree o Add FPGA memory window to static dev mappings o Fix whitespace Modified: head/sys/arm/altera/socfpga/socfpga_machdep.c head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts head/sys/dev/beri/virtio/virtio.h Modified: head/sys/arm/altera/socfpga/socfpga_machdep.c ============================================================================== --- head/sys/arm/altera/socfpga/socfpga_machdep.c Tue Nov 25 15:58:59 2014 (r275048) +++ head/sys/arm/altera/socfpga/socfpga_machdep.c Tue Nov 25 16:06:19 2014 (r275049) @@ -95,6 +95,9 @@ platform_devmap_init(void) /* scu */ arm_devmap_add_entry(0xfff00000, 0x100000); + /* FPGA memory window, 256MB */ + arm_devmap_add_entry(0xd0000000, 0x10000000); + return (0); } Modified: head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts ============================================================================== --- head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts Tue Nov 25 15:58:59 2014 (r275048) +++ head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts Tue Nov 25 16:06:19 2014 (r275049) @@ -38,8 +38,8 @@ model = "Terasic SoCKit"; compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - /* Reserve first page for secondary CPU trampoline code */ - memreserve = < 0x00000000 0x1000 >; + memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */ + < 0x00001000 0x1000 >; /* virtio block */ memory { device_type = "memory"; @@ -69,6 +69,8 @@ }; mmc: dwmmc@ff704000 { + #address-cells = <1>; + #size-cells = <0>; status = "okay"; num-slots = <1>; supports-highspeed; @@ -81,9 +83,34 @@ }; }; - beri_mem: mem@d0000000 { + beri_mem0: mem@d0000000 { compatible = "sri-cambridge,beri-mem"; - reg = <0xd0000000 0x10000000>; + reg = <0xd0000000 0x10000000>; /* 256mb */ + status = "okay"; + }; + + pio0: pio@c0020000 { + compatible = "altr,pio"; + reg = <0xc0020000 0x1000>; /* recv */ + interrupts = < 76 >; + interrupt-parent = <&GIC>; + status = "okay"; + }; + + pio1: pio@c0021000 { + compatible = "altr,pio"; + reg = <0xc0021000 0x1000>; /* send */ + interrupts = < 82 >; /* not in use on arm side */ + interrupt-parent = <&GIC>; + status = "okay"; + }; + + beri_vtblk: vtblk@00001000 { + compatible = "sri-cambridge,beri-vtblk"; + reg = <0x00001000 0x1000>; + pio-recv = <&pio0>; + pio-send = <&pio1>; + beri-mem = <&beri_mem0>; status = "okay"; }; Modified: head/sys/dev/beri/virtio/virtio.h ============================================================================== --- head/sys/dev/beri/virtio/virtio.h Tue Nov 25 15:58:59 2014 (r275048) +++ head/sys/dev/beri/virtio/virtio.h Tue Nov 25 16:06:19 2014 (r275049) @@ -39,7 +39,7 @@ #define WRITE4(_sc, _reg, _val) \ bus_write_4((_sc)->res[0], _reg, _val) -#define PAGE_SHIFT 12 +#define PAGE_SHIFT 12 #define VRING_ALIGN 4096 #define NUM_QUEUES 1