From owner-p4-projects@FreeBSD.ORG Mon Aug 25 17:19:44 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 91C1416A4C1; Mon, 25 Aug 2003 17:19:44 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 3710D16A4BF; Mon, 25 Aug 2003 17:19:44 -0700 (PDT) Received: from canning.wemm.org (canning.wemm.org [192.203.228.65]) by mx1.FreeBSD.org (Postfix) with ESMTP id A79DD43FCB; Mon, 25 Aug 2003 17:19:43 -0700 (PDT) (envelope-from peter@wemm.org) Received: from wemm.org (localhost [127.0.0.1]) by canning.wemm.org (Postfix) with ESMTP id 8BDBC2A8D4; Mon, 25 Aug 2003 17:19:43 -0700 (PDT) (envelope-from peter@wemm.org) X-Mailer: exmh version 2.5 07/13/2001 with nmh-1.0.4 To: John Baldwin In-Reply-To: Date: Mon, 25 Aug 2003 17:19:43 -0700 From: Peter Wemm Message-Id: <20030826001943.8BDBC2A8D4@canning.wemm.org> cc: Marcel Moolenaar cc: Perforce Change Reviews Subject: Re: PERFORCE change 36551 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Aug 2003 00:19:45 -0000 John Baldwin wrote: > > On 21-Aug-2003 John Baldwin wrote: > > > > On 21-Aug-2003 Marcel Moolenaar wrote: > >> http://perforce.freebsd.org/chv.cgi?CH=36551 > >> > >> Change 36551 by marcel@marcel_nfs on 2003/08/21 00:30:38 > >> > >> Aarrgghh. The interrupt issue on pluto1 and pluto2 are > >> very likely not driver problems. I forgot we have a hack > >> on the ia64 branch to deal with the fact that the non- > >> legacy interrupts used by the UARTs are edge sensitive, > >> active high. We really need to get that fixed in CVS... > >> > >> Affected files ... > >> > >> .. //depot/projects/uart/ia64/ia64/interrupt.c#4 edit > >> > >> Differences ... > >> > >> ==== //depot/projects/uart/ia64/ia64/interrupt.c#4 (text+ko) ==== > >> > >> @@ -266,9 +266,18 @@ > >> struct sapic *sa = ia64_sapics[i]; > >> if (irq < sa->sa_base || irq > sa->sa_limit) > >> continue; > >> + /* > >> + * KLUDGE: Not all interrupts higher or equal to 16 are > >> + * active low and level sensitive. We don't know yet how > >> + * to check for this, so we hardcode the 2 cases we have > >> + * wrong explicitly. This kludge is specific to the HP > >> + * rx2600... > >> + */ > > > > Have you tried looking at any interrupt overrides in the MADT? > > That is where the BIOS should tell you which interrupts above 15 > > have ISA-like parameters. > > s/BIOS/EFI/ For the record: /* APIC: Length=192, Revision=1, Checksum=121, OEMID=HP, OEM Table ID=rx2600, OEM Revision=0x0, Creator ID=HP, Creator Revision=0x0 */ /* Local APIC ADDR=0xfee00000 Flags={} Type=Local APIC Override Local APIC ADDR=0x00000000fee00000 Type=Local SAPIC ACPI CPU=0 Flags={ENABLED} APIC ID=0 APIC EID=0 Type=Local SAPIC ACPI CPU=1 Flags={ENABLED} APIC ID=1 APIC EID=0 Type=IO SAPIC APIC ID=0 INT BASE=16 ADDR=0xfed20800 Type=IO SAPIC APIC ID=1 INT BASE=27 ADDR=0xfed22800 Type=IO SAPIC APIC ID=2 INT BASE=38 ADDR=0xfed24800 Type=IO SAPIC APIC ID=3 INT BASE=49 ADDR=0xfed26800 Type=IO SAPIC APIC ID=4 INT BASE=60 ADDR=0xfed28800 Type=IO SAPIC APIC ID=6 INT BASE=71 ADDR=0xfed2c800 Type=IO SAPIC APIC ID=7 INT BASE=82 ADDR=0xfed2e800 */ Cheers, -Peter -- Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com "All of this is for nothing if we don't go to the stars" - JMS/B5