From owner-svn-src-stable@FreeBSD.ORG Wed Mar 23 22:33:30 2011 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1F1DF106564A; Wed, 23 Mar 2011 22:33:30 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 0DB0F8FC1E; Wed, 23 Mar 2011 22:33:30 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p2NMXUpp009367; Wed, 23 Mar 2011 22:33:30 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p2NMXUIp009364; Wed, 23 Mar 2011 22:33:30 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201103232233.p2NMXUIp009364@svn.freebsd.org> From: Marius Strobl Date: Wed, 23 Mar 2011 22:33:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org X-SVN-Group: stable-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r219940 - in stable/8: libexec/rtld-elf/sparc64 sys/sparc64/sparc64 X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Mar 2011 22:33:30 -0000 Author: marius Date: Wed Mar 23 22:33:29 2011 New Revision: 219940 URL: http://svn.freebsd.org/changeset/base/219940 Log: MFC: r219339, r219532 - Remove clause 3 and 4 from TNF licenses. [1] - Add the _RF_X committed in r212998 (merged to stable/8 in r213478) also to the tables in the sparc64 reloc.c in order reduce differences between the kernel and the userland source. This results in no functional change though. - Consistently abbreviate the names of the relocations. - End sentences with dots. - Fix whitespace. Obtained from: NetBSD [1] Modified: stable/8/libexec/rtld-elf/sparc64/reloc.c stable/8/sys/sparc64/sparc64/elf_machdep.c Directory Properties: stable/8/libexec/rtld-elf/ (props changed) stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/libexec/rtld-elf/sparc64/reloc.c ============================================================================== --- stable/8/libexec/rtld-elf/sparc64/reloc.c Wed Mar 23 22:08:01 2011 (r219939) +++ stable/8/libexec/rtld-elf/sparc64/reloc.c Wed Mar 23 22:33:29 2011 (r219940) @@ -1,4 +1,4 @@ -/* $NetBSD: mdreloc.c,v 1.5 2001/04/25 12:24:51 kleink Exp $ */ +/* $NetBSD: mdreloc.c,v 1.42 2008/04/28 20:23:04 martin Exp $ */ /*- * Copyright (c) 2000 Eduardo Horvath. @@ -16,13 +16,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED @@ -66,28 +59,29 @@ __FBSDID("$FreeBSD$"); * * the relocation is relative to the load address * */ -#define _RF_S 0x80000000 /* Resolve symbol */ -#define _RF_A 0x40000000 /* Use addend */ -#define _RF_P 0x20000000 /* Location relative */ -#define _RF_G 0x10000000 /* GOT offset */ -#define _RF_B 0x08000000 /* Load address relative */ -#define _RF_U 0x04000000 /* Unaligned */ -#define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ -#define _RF_RS(s) ( (s) & 0xff) /* right shift */ +#define _RF_S 0x80000000 /* Resolve symbol */ +#define _RF_A 0x40000000 /* Use addend */ +#define _RF_P 0x20000000 /* Location relative */ +#define _RF_G 0x10000000 /* GOT offset */ +#define _RF_B 0x08000000 /* Load address relative */ +#define _RF_U 0x04000000 /* Unaligned */ +#define _RF_X 0x02000000 /* Bare symbols, needs proc */ +#define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ +#define _RF_RS(s) ( (s) & 0xff) /* right shift */ static const int reloc_target_flags[] = { 0, /* NONE */ - _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ - _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ + _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* 8 */ + _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* 16 */ + _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 32 */ _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(10), /* HI22 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 22 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 13 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* LO10 */ _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */ _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */ _RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */ @@ -106,90 +100,88 @@ static const int reloc_target_flags[] = _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */ _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */ _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */ - _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 10 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 11 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(64) | _RF_RS(0), /* 64 */ _RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(42), /* HH22 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(32), /* HM10 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(10), /* LM22 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */ _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 7 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 5 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* 6 */ _RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */ _RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(22), /* H44 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(12), /* M44 */ + _RF_S|_RF_A|_RF_X| _RF_SZ(32) | _RF_RS(0), /* L44 */ _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */ _RF_S|_RF_A| _RF_U| _RF_SZ(64) | _RF_RS(0), /* UA64 */ _RF_S|_RF_A| _RF_U| _RF_SZ(16) | _RF_RS(0), /* UA16 */ }; #if 0 -static const char *reloc_names[] = { - "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", - "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", - "22", "13", "LO10", "GOT10", "GOT13", - "GOT22", "PC10", "PC22", "WPLT30", "COPY", - "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", - "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", - "10", "11", "64", "OLO10", "HH22", - "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", - "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", - "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", +static const char *const reloc_names[] = { + "NONE", "8", "16", "32", "DISP_8", "DISP_16", "DISP_32", "WDISP_30", + "WDISP_22", "HI22", "22", "13", "LO10", "GOT10", "GOT13", "GOT22", + "PC10", "PC22", "WPLT30", "COPY", "GLOB_DAT", "JMP_SLOT", "RELATIVE", + "UA_32", "PLT32", "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", + "PCPLT32", "10", "11", "64", "OLO10", "HH22", "HM10", "LM22", + "PC_HH22", "PC_HM10", "PC_LM22", "WDISP16", "WDISP19", "GLOB_JMP", + "7", "5", "6", "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", "L44", "REGISTER", "UA64", "UA16" }; #endif -#define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) -#define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) -#define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) -#define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) -#define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) -#define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) -#define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) +#define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) +#define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) +#define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) +#define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) +#define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) +#define RELOC_BARE_SYMBOL(t) ((reloc_target_flags[t] & _RF_X) != 0) +#define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) +#define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) static const long reloc_target_bitmask[] = { -#define _BM(x) (~(-(1ULL << (x)))) +#define _BM(x) (~(-(1ULL << (x)))) 0, /* NONE */ - _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ + _BM(8), _BM(16), _BM(32), /* 8, 16, 32 */ _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ _BM(30), _BM(22), /* WDISP30, WDISP22 */ - _BM(22), _BM(22), /* HI22, _22 */ - _BM(13), _BM(10), /* RELOC_13, _LO10 */ + _BM(22), _BM(22), /* HI22, 22 */ + _BM(13), _BM(10), /* 13, LO10 */ _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ - _BM(10), _BM(22), /* _PC10, _PC22 */ - _BM(30), 0, /* _WPLT30, _COPY */ - _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ - _BM(32), _BM(32), /* _UA32, PLT32 */ - _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ - _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ - _BM(10), _BM(11), -1, /* _10, _11, _64 */ - _BM(13), _BM(22), /* _OLO10, _HH22 */ - _BM(10), _BM(22), /* _HM10, _LM22 */ - _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ - _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ + _BM(10), _BM(22), /* PC10, PC22 */ + _BM(30), 0, /* WPLT30, COPY */ + _BM(32), _BM(32), _BM(32), /* GLOB_DAT, JMP_SLOT, RELATIVE */ + _BM(32), _BM(32), /* UA32, PLT32 */ + _BM(22), _BM(10), /* HIPLT22, LOPLT10 */ + _BM(32), _BM(22), _BM(10), /* PCPLT32, PCPLT22, PCPLT10 */ + _BM(10), _BM(11), -1, /* 10, 11, 64 */ + _BM(13), _BM(22), /* OLO10, HH22 */ + _BM(10), _BM(22), /* HM10, LM22 */ + _BM(22), _BM(10), _BM(22), /* PC_HH22, PC_HM10, PC_LM22 */ + _BM(16), _BM(19), /* WDISP16, WDISP19 */ -1, /* GLOB_JMP */ - _BM(7), _BM(5), _BM(6), /* _7, _5, _6 */ + _BM(7), _BM(5), _BM(6), /* 7, 5, 6 */ -1, -1, /* DISP64, PLT64 */ _BM(22), _BM(13), /* HIX22, LOX10 */ _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ #undef _BM }; -#define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) +#define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) #undef flush -#define flush(va, offs) \ +#define flush(va, offs) \ __asm __volatile("flush %0 + %1" : : "r" (va), "I" (offs)); static int reloc_nonplt_object(Obj_Entry *obj, const Elf_Rela *rela, @@ -301,11 +293,11 @@ reloc_nonplt_object(Obj_Entry *obj, cons if (type == R_SPARC_NONE) return (0); - /* We do JMP_SLOTs below */ + /* We do JMP_SLOTs below. */ if (type == R_SPARC_JMP_SLOT) return (0); - /* COPY relocs are also handled elsewhere */ + /* COPY relocs are also handled elsewhere. */ if (type == R_SPARC_COPY) return (0); @@ -319,11 +311,11 @@ reloc_nonplt_object(Obj_Entry *obj, cons value = rela->r_addend; /* - * Handle relative relocs here, because we might not - * be able to access globals yet. + * Handle relative relocs here, because we might not be able to access + * globals yet. */ if (type == R_SPARC_RELATIVE) { - /* XXXX -- apparently we ignore the preexisting value */ + /* XXXX -- apparently we ignore the preexisting value. */ *where = (Elf_Addr)(obj->relocbase + value); return (0); } @@ -333,14 +325,13 @@ reloc_nonplt_object(Obj_Entry *obj, cons * a non-local variable is accessed. */ if (RELOC_RESOLVE_SYMBOL(type)) { - - /* Find the symbol */ + /* Find the symbol. */ def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, false, cache); if (def == NULL) return (-1); - /* Add in the symbol's absolute address */ + /* Add in the symbol's absolute address. */ value += (Elf_Addr)(defobj->relocbase + def->st_value); } @@ -354,12 +345,12 @@ reloc_nonplt_object(Obj_Entry *obj, cons /* * Note that even though sparcs use `Elf_rela' exclusively * we still need the implicit memory addend in relocations - * referring to GOT entries. Undoubtedly, someone f*cked + * referring to GOT entries. Undoubtedly, someone f*cked * this up in the distant past, and now we're stuck with - * it in the name of compatibility for all eternity.. + * it in the name of compatibility for all eternity ... * * In any case, the implicit and explicit should be mutually - * exclusive. We provide a check for that here. + * exclusive. We provide a check for that here. */ /* XXXX -- apparently we ignore the preexisting value */ value += (Elf_Addr)(obj->relocbase); @@ -443,10 +434,9 @@ reloc_plt(Obj_Entry *obj) #define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */ #define ORG5 0x82804005 /* or %g1, %g5, %g1 */ - /* %hi(v) with variable shift */ #define HIVAL(v, s) (((v) >> (s)) & 0x003fffff) -#define LOVAL(v) ((v) & 0x000003ff) +#define LOVAL(v) ((v) & 0x000003ff) int reloc_jmpslots(Obj_Entry *obj) @@ -475,7 +465,7 @@ reloc_jmpslots(Obj_Entry *obj) Elf_Addr reloc_jmpslot(Elf_Addr *wherep, Elf_Addr target, const Obj_Entry *obj, - const Obj_Entry *refobj, const Elf_Rel *rel) + const Obj_Entry *refobj, const Elf_Rel *rel) { const Elf_Rela *rela = (const Elf_Rela *)rel; Elf_Addr offset; @@ -511,7 +501,8 @@ reloc_jmpslot(Elf_Addr *wherep, Elf_Addr offset = ((Elf_Addr)where) - target; if (offset <= (1L<<20) && offset >= -(1L<<20)) { /* - * We're within 1MB -- we can use a direct branch insn. + * We're within 1MB -- we can use a direct branch + * instruction. * * We can generate this pattern: * @@ -594,7 +585,8 @@ reloc_jmpslot(Elf_Addr *wherep, Elf_Addr flush(where, 4); } else if (offset >= 0 && offset < (1L<<44)) { /* - * We're withing 44 bits. We can generate this pattern: + * We're withing 44 bits. We can generate this + * pattern: * * The resulting code in the jump slot is: * @@ -618,7 +610,8 @@ reloc_jmpslot(Elf_Addr *wherep, Elf_Addr flush(where, 4); } else if (offset < 0 && offset > -(1L<<44)) { /* - * We're withing 44 bits. We can generate this pattern: + * We're withing 44 bits. We can generate this + * pattern: * * The resulting code in the jump slot is: * @@ -673,7 +666,7 @@ reloc_jmpslot(Elf_Addr *wherep, Elf_Addr /* * This is a high PLT slot; the relocation offset specifies a * pointer that needs to be frobbed; no actual code needs to - * be modified. The pointer to be calculated needs the addend + * be modified. The pointer to be calculated needs the addend * added and the reference object relocation base subtraced. */ *wherep = target + rela->r_addend - @@ -732,21 +725,21 @@ install_plt(Elf_Word *pltgot, Elf_Addr p void allocate_initial_tls(Obj_Entry *objs) { - Elf_Addr* tpval; + Elf_Addr* tpval; - /* - * Fix the size of the static TLS block by using the maximum - * offset allocated so far and adding a bit for dynamic modules to - * use. - */ - tls_static_space = tls_last_offset + RTLD_STATIC_TLS_EXTRA; - tpval = allocate_tls(objs, NULL, 3*sizeof(Elf_Addr), sizeof(Elf_Addr)); - __asm __volatile("mov %0, %%g7" : : "r" (tpval)); + /* + * Fix the size of the static TLS block by using the maximum offset + * allocated so far and adding a bit for dynamic modules to use. + */ + tls_static_space = tls_last_offset + RTLD_STATIC_TLS_EXTRA; + tpval = allocate_tls(objs, NULL, 3 * sizeof(Elf_Addr), + sizeof(Elf_Addr)); + __asm __volatile("mov %0, %%g7" : : "r" (tpval)); } void *__tls_get_addr(tls_index *ti) { - register Elf_Addr** tp __asm__("%g7"); + register Elf_Addr** tp __asm__("%g7"); - return tls_get_addr_common(tp, ti->ti_module, ti->ti_offset); + return (tls_get_addr_common(tp, ti->ti_module, ti->ti_offset)); } Modified: stable/8/sys/sparc64/sparc64/elf_machdep.c ============================================================================== --- stable/8/sys/sparc64/sparc64/elf_machdep.c Wed Mar 23 22:08:01 2011 (r219939) +++ stable/8/sys/sparc64/sparc64/elf_machdep.c Wed Mar 23 22:33:29 2011 (r219940) @@ -15,13 +15,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED @@ -35,7 +28,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - * from: NetBSD: mdreloc.c,v 1.5 2001/04/25 12:24:51 kleink Exp + * from: NetBSD: mdreloc.c,v 1.42 2008/04/28 20:23:04 martin Exp */ #include @@ -149,20 +142,20 @@ elf64_dump_thread(struct thread *td __un * * the relocation is relative to the load address * */ -#define _RF_S 0x80000000 /* Resolve symbol */ -#define _RF_A 0x40000000 /* Use addend */ -#define _RF_P 0x20000000 /* Location relative */ -#define _RF_G 0x10000000 /* GOT offset */ -#define _RF_B 0x08000000 /* Load address relative */ -#define _RF_U 0x04000000 /* Unaligned */ +#define _RF_S 0x80000000 /* Resolve symbol */ +#define _RF_A 0x40000000 /* Use addend */ +#define _RF_P 0x20000000 /* Location relative */ +#define _RF_G 0x10000000 /* GOT offset */ +#define _RF_B 0x08000000 /* Load address relative */ +#define _RF_U 0x04000000 /* Unaligned */ #define _RF_X 0x02000000 /* Bare symbols, needs proc */ -#define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ -#define _RF_RS(s) ( (s) & 0xff) /* right shift */ +#define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ +#define _RF_RS(s) ( (s) & 0xff) /* right shift */ static const int reloc_target_flags[] = { 0, /* NONE */ - _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ - _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ - _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ + _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* 8 */ + _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* 16 */ + _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 32 */ _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ @@ -220,58 +213,55 @@ static const int reloc_target_flags[] = #if 0 static const char *const reloc_names[] = { - "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", - "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", - "22", "13", "LO10", "GOT10", "GOT13", - "GOT22", "PC10", "PC22", "WPLT30", "COPY", - "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", - "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", - "10", "11", "64", "OLO10", "HH22", - "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", - "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", - "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", + "NONE", "8", "16", "32", "DISP_8", "DISP_16", "DISP_32", "WDISP_30", + "WDISP_22", "HI22", "22", "13", "LO10", "GOT10", "GOT13", "GOT22", + "PC10", "PC22", "WPLT30", "COPY", "GLOB_DAT", "JMP_SLOT", "RELATIVE", + "UA_32", "PLT32", "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", + "PCPLT32", "10", "11", "64", "OLO10", "HH22", "HM10", "LM22", + "PC_HH22", "PC_HM10", "PC_LM22", "WDISP16", "WDISP19", "GLOB_JMP", + "7", "5", "6", "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", "L44", "REGISTER", "UA64", "UA16" }; #endif -#define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) -#define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) -#define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) -#define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) -#define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) +#define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) +#define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) +#define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) +#define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) +#define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) #define RELOC_BARE_SYMBOL(t) ((reloc_target_flags[t] & _RF_X) != 0) -#define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) -#define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) +#define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) +#define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) static const long reloc_target_bitmask[] = { -#define _BM(x) (~(-(1ULL << (x)))) +#define _BM(x) (~(-(1ULL << (x)))) 0, /* NONE */ - _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ + _BM(8), _BM(16), _BM(32), /* 8, 16, 32 */ _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ _BM(30), _BM(22), /* WDISP30, WDISP22 */ - _BM(22), _BM(22), /* HI22, _22 */ - _BM(13), _BM(10), /* RELOC_13, _LO10 */ + _BM(22), _BM(22), /* HI22, 22 */ + _BM(13), _BM(10), /* 13, LO10 */ _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ - _BM(10), _BM(22), /* _PC10, _PC22 */ - _BM(30), 0, /* _WPLT30, _COPY */ - _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ - _BM(32), _BM(32), /* _UA32, PLT32 */ - _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ - _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ - _BM(10), _BM(11), -1, /* _10, _11, _64 */ - _BM(13), _BM(22), /* _OLO10, _HH22 */ - _BM(10), _BM(22), /* _HM10, _LM22 */ - _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ - _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ + _BM(10), _BM(22), /* PC10, PC22 */ + _BM(30), 0, /* WPLT30, COPY */ + _BM(32), _BM(32), _BM(32), /* GLOB_DAT, JMP_SLOT, RELATIVE */ + _BM(32), _BM(32), /* UA32, PLT32 */ + _BM(22), _BM(10), /* HIPLT22, LOPLT10 */ + _BM(32), _BM(22), _BM(10), /* PCPLT32, PCPLT22, PCPLT10 */ + _BM(10), _BM(11), -1, /* 10, 11, 64 */ + _BM(13), _BM(22), /* OLO10, HH22 */ + _BM(10), _BM(22), /* HM10, LM22 */ + _BM(22), _BM(10), _BM(22), /* PC_HH22, PC_HM10, PC_LM22 */ + _BM(16), _BM(19), /* WDISP16, WDISP19 */ -1, /* GLOB_JMP */ - _BM(7), _BM(5), _BM(6) /* _7, _5, _6 */ + _BM(7), _BM(5), _BM(6), /* 7, 5, 6 */ -1, -1, /* DISP64, PLT64 */ _BM(22), _BM(13), /* HIX22, LOX10 */ _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ #undef _BM }; -#define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) +#define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) int elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data,