From owner-p4-projects@FreeBSD.ORG Mon Jul 10 07:57:37 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id D78FE16A4E2; Mon, 10 Jul 2006 07:57:36 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id B1CC816A4E0 for ; Mon, 10 Jul 2006 07:57:36 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 40BDB43D5A for ; Mon, 10 Jul 2006 07:57:36 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k6A7vap6031262 for ; Mon, 10 Jul 2006 07:57:36 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k6A7vaSI031259 for perforce@freebsd.org; Mon, 10 Jul 2006 07:57:36 GMT (envelope-from imp@freebsd.org) Date: Mon, 10 Jul 2006 07:57:36 GMT Message-Id: <200607100757.k6A7vaSI031259@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 101185 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Jul 2006 07:57:37 -0000 http://perforce.freebsd.org/chv.cgi?CH=101185 Change 101185 by imp@imp_lighthouse on 2006/07/10 07:57:06 commentary update Affected files ... .. //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#36 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#36 (text+ko) ==== @@ -328,8 +328,10 @@ atsc = (struct at91_usart_softc *)sc; /* - * See if we have a TIMEOUT bit. We disable all interrupts to - * minimize interference. + * See if we have a TIMEOUT bit. We disable all interrupts as + * a side effect. Boot loaders may have enabled them. Since + * a TIMEOUT interrupt can't happen without other setup, the + * apparent race here can't actually happen. */ WR4(&sc->sc_bas, USART_IDR, 0xffffffff); WR4(&sc->sc_bas, USART_IER, USART_CSR_TIMEOUT);