From owner-freebsd-hackers@FreeBSD.ORG Thu Nov 13 16:56:36 2008 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A37401065677 for ; Thu, 13 Nov 2008 16:56:36 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from QMTA08.westchester.pa.mail.comcast.net (qmta08.westchester.pa.mail.comcast.net [76.96.62.80]) by mx1.freebsd.org (Postfix) with ESMTP id BD6E48FC17 for ; Thu, 13 Nov 2008 16:56:34 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from OMTA03.westchester.pa.mail.comcast.net ([76.96.62.27]) by QMTA08.westchester.pa.mail.comcast.net with comcast id ec7S1a0080bG4ec58gvyWP; Thu, 13 Nov 2008 16:55:58 +0000 Received: from koitsu.dyndns.org ([69.181.141.110]) by OMTA03.westchester.pa.mail.comcast.net with comcast id egwX1a00C2P6wsM3PgwXMM; Thu, 13 Nov 2008 16:56:32 +0000 X-Authority-Analysis: v=1.0 c=1 a=QycZ5dHgAAAA:8 a=MOSdjJYJR23rC8e5Fy4A:9 a=WfV_lprAH_aP9Mk3ZCctL604WAEA:4 a=EoioJ0NPDVgA:10 a=LY0hPdMaydYA:10 Received: by icarus.home.lan (Postfix, from userid 1000) id 260625C19; Thu, 13 Nov 2008 08:56:31 -0800 (PST) Date: Thu, 13 Nov 2008 08:56:31 -0800 From: Jeremy Chadwick To: freebsd-hackers@freebsd.org Message-ID: <20081113165631.GA26469@icarus.home.lan> References: <491BFB68.7050405@infoweapons.com> <20081113104054.GA17501@icarus.home.lan> <20081113154003.GC1750@britannica.bec.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20081113154003.GC1750@britannica.bec.de> User-Agent: Mutt/1.5.18 (2008-05-17) Subject: Re: assigning interrupts X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Nov 2008 16:56:36 -0000 On Thu, Nov 13, 2008 at 04:40:03PM +0100, Joerg Sonnenberger wrote: > On Thu, Nov 13, 2008 at 02:40:54AM -0800, Jeremy Chadwick wrote: > > Otherwise, consider purchasing a motherboard that has an APIC (this is > > not a typo) increasing the IRQ count to 256. > > This is wrong. The first IO-APIC gives you 8 additional interrupts to > the 16 ISA interrupt lines. Every additional IO-APIC gives you 24 more. > Most modern chipsets have one IO-APIC, at least for non-embedded > systems. It doesn't mean you don't get interrupt sharing though. I think the problem is that I was thinking of local APICs, which provide a few hundred (I don't remember the exact number) IRQs to an I/O APIC. For what it's worth, the devices he listed are exclusively on the PCI bus. Regarding "it means you can still get interrupt sharing", I'd like to hear more about why/how that's possible with a system sporting at least one I/O APIC. -- | Jeremy Chadwick jdc at parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP: 4BD6C0CB |