Date: Mon, 23 Dec 1996 22:05:33 -0800 From: David Greenman <dg@root.com> To: Erich Boleyn <erich@uruk.org> Cc: smp@freebsd.org, haertel@ichips.intel.com, wscott@ichips.intel.com Subject: Re: I think we have the culprit!! (was -> Re: Eureka (maybe...) (was -> Re: P6 problem idea ) ) Message-ID: <199612240605.WAA27540@root.com> In-Reply-To: Your message of "Mon, 23 Dec 1996 22:21:49 PST." <E0vcQFJ-0003Y6-00@uruk.org>
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> >Erich Boleyn <erich@uruk.org> writes: > >> I tried shutting off the page global stuff, and while I don't have >> a difinitively long run yet, it has run through 3 full kernel compiles >> with no crash yet. I'll run it for the next 1 1/2 hours and see if >> it lives through that. If so, I think we have our main culprit (I'll >> also post the (small) code change which synchronizes the CPUs on TLB >> shootdown before letting the sender continue). > >Well, after 2 hours of kernel builds, and now a few sets of 4 parallel >kernel builds later, the system is still running great. > >I think we have our culprit... the Page Global stuff (plus adding the >TLB shootdown synchronization may be helping a little with stability, but >it's absence doesn't appear to be the major cause). > >> All that said, I'm very surprised that this *isn't* also a serious >> problem on the Pentium (the Pentium has the Page Global stuff as >> well... I didn't look to see if it is used for the Pentium as well >> as the Pentium Pro). > >I might be confused here, but as mentioned in the above comment, I >thought this was implemented in the Pentium as well. Can someone >who remembers better (or has the "Appendix H" equivalent released >documentation) comment? Tge "PGE" feature doesn't appear to be present in the stepping 4 or stepping 12 chips that I have here...so if the Pentium has the feature, it must have been added only very recently. -DG David Greenman Core-team/Principal Architect, The FreeBSD Project
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