From owner-freebsd-virtualization@FreeBSD.ORG Tue Dec 10 20:28:00 2013 Return-Path: Delivered-To: virtualization@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 683BBF13; Tue, 10 Dec 2013 20:28:00 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher ADH-CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 235551DB9; Tue, 10 Dec 2013 20:27:57 +0000 (UTC) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 188E3B986; Tue, 10 Dec 2013 15:27:56 -0500 (EST) From: John Baldwin To: grehan@freebsd.org, neel@freebsd.org Subject: [PATCH] Additional lapic support for bhyve Date: Tue, 10 Dec 2013 15:27:47 -0500 User-Agent: KMail/1.13.5 (FreeBSD/8.4-CBSD-20130906; KDE/4.5.5; amd64; ; ) MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201312101527.47234.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Tue, 10 Dec 2013 15:27:56 -0500 (EST) Cc: virtualization@freebsd.org X-BeenThere: freebsd-virtualization@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Discussion of various virtualization techniques FreeBSD supports." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Dec 2013 20:28:00 -0000 This patch extends the local APIC emulation a bit by adding the following things: - Add an ioctl and a bhyvectl command to trigger local interrupts on a local APIC. The "fixed" and "NMI" delivery modes are enabled. - Add support for the CMCI LVT entry. - Add the ability to report local APIC errors and trigger errors for invalid vectors when sending IPIs or firing an external interrupt that references an invalid IDT vector. - Silently force all reserved fields in LVT entries to zero when they are written (removes the need for clearing those bits when triggering an LVT interrupt). - Add entries to the MP Table and MADT to advertise the typical x86 LINT configuration (ExtINT on LINT0 and NMI on LINT1). - Add a bhyvectl command to inject an NMI on an arbitrary CPU (this latter should probably be a separate patch) In particular, while bhyectl --inject-nmi can inject an NMI on a single vcpu, the more traditional way of signalling a system-wide error (such as SERR# or PERR#) is to assert the LINT1 pins on all CPUs. This can now be done via 'bhyectl --vm=foo --cpu=-1 --assert-lapic-lvt=1' (cpu of -1 is a broadcast to all CPUs for the LVT ioctl). The patch is at people.freebsd.org/~jhb/patches/bhyve_lapic.patch I'm certainly open to suggestions on ways to make this be more consistent with the style/design/flow of the existing code. (I started on this because I want to add support for machine check injection so I can use bhyve to test the machine check code, but for that I wanted CMCI support and it kind of snowballed from there) -- John Baldwin