From owner-p4-projects@FreeBSD.ORG Sat Feb 18 14:16:32 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 26A401065677; Sat, 18 Feb 2012 14:16:32 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D476A106564A for ; Sat, 18 Feb 2012 14:16:31 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id A30B48FC0A for ; Sat, 18 Feb 2012 14:16:31 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q1IEGV2p067132 for ; Sat, 18 Feb 2012 14:16:31 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q1IEGVSS067129 for perforce@freebsd.org; Sat, 18 Feb 2012 14:16:31 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Sat, 18 Feb 2012 14:16:31 GMT Message-Id: <201202181416.q1IEGVSS067129@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson To: Perforce Change Reviews Precedence: bulk Cc: Subject: PERFORCE change 206500 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 18 Feb 2012 14:16:32 -0000 http://p4web.freebsd.org/@@206500?ac=10 Change 206500 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/02/18 14:15:58 Condition more use of the MIPS4k 'sync' instruction on options SMP in the FreeBSD kernel. Normally the instruction would degrade to a 'nop' on UP MIPS hardware, but not currently our MIPS hardware. However, it may be worth making this change in FreeBSD as well, since we believe these instructions aren't required -- something to confirm with hard-core MIPS hackers. Affected files ... .. //depot/projects/ctsrd/beribsd/src/sys/mips/include/atomic.h#2 edit .. //depot/projects/ctsrd/beribsd/src/sys/mips/mips/exception.S#2 edit .. //depot/projects/ctsrd/beribsd/src/sys/mips/mips/swtch.S#2 edit Differences ... ==== //depot/projects/ctsrd/beribsd/src/sys/mips/include/atomic.h#2 (text+ko) ==== @@ -49,7 +49,9 @@ mips_sync(void) { __asm __volatile (".set noreorder\n\t" +#ifdef SMP "sync\n\t" +#endif "nop\n\t" "nop\n\t" "nop\n\t" ==== //depot/projects/ctsrd/beribsd/src/sys/mips/mips/exception.S#2 (text+ko) ==== @@ -387,7 +387,9 @@ or a1, a1, a0 SAVE_REG(a1, SR, sp) RESTORE_CPU # v0 contains the return address. +#ifdef SMP sync +#endif eret .set at END(MipsKernGenException) @@ -553,7 +555,9 @@ mtc0 k0, MIPS_COP_0_STATUS # still exception level ITLBNOPFIX +#ifdef SMP sync +#endif eret .set at END(MipsUserGenException) @@ -645,7 +649,9 @@ SAVE_REG(a1, SR, sp) REG_L v0, CALLFRAME_RA + KERN_REG_SIZE(sp) RESTORE_CPU # v0 contains the return address. +#ifdef SMP sync +#endif eret .set at END(MipsKernIntr) @@ -820,7 +826,9 @@ mtc0 k0, MIPS_COP_0_STATUS # SR with EXL set. ITLBNOPFIX +#ifdef SMP sync +#endif eret .set at END(MipsUserIntr) ==== //depot/projects/ctsrd/beribsd/src/sys/mips/mips/swtch.S#2 (text+ko) ==== @@ -160,7 +160,9 @@ or k0, k0, k1 mtc0 k0, MIPS_COP_0_STATUS # switch to user mode (when eret...) HAZARD_DELAY +#ifdef SMP sync +#endif eret .set at END(fork_trampoline)