From owner-svn-src-all@freebsd.org Wed May 4 15:52:41 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E9644B2B099; Wed, 4 May 2016 15:52:41 +0000 (UTC) (envelope-from pfg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B5925134B; Wed, 4 May 2016 15:52:41 +0000 (UTC) (envelope-from pfg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u44Fqe7v031833; Wed, 4 May 2016 15:52:40 GMT (envelope-from pfg@FreeBSD.org) Received: (from pfg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u44Fqexs031831; Wed, 4 May 2016 15:52:40 GMT (envelope-from pfg@FreeBSD.org) Message-Id: <201605041552.u44Fqexs031831@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: pfg set sender to pfg@FreeBSD.org using -f From: "Pedro F. Giffuni" Date: Wed, 4 May 2016 15:52:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r299070 - in head/sys/sparc64: sbus sparc64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 May 2016 15:52:42 -0000 Author: pfg Date: Wed May 4 15:52:40 2016 New Revision: 299070 URL: https://svnweb.freebsd.org/changeset/base/299070 Log: sys/sparc64: minor spelling fixes. Only affects comments: no functional change. Modified: head/sys/sparc64/sbus/sbus.c head/sys/sparc64/sparc64/intr_machdep.c Modified: head/sys/sparc64/sbus/sbus.c ============================================================================== --- head/sys/sparc64/sbus/sbus.c Wed May 4 15:48:59 2016 (r299069) +++ head/sys/sparc64/sbus/sbus.c Wed May 4 15:52:40 2016 (r299070) @@ -341,7 +341,7 @@ sbus_attach(device_t dev) sc->sc_burst = (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF; - /* initalise the IOMMU */ + /* initialise the IOMMU */ /* punch in our copies */ sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS); Modified: head/sys/sparc64/sparc64/intr_machdep.c ============================================================================== --- head/sys/sparc64/sparc64/intr_machdep.c Wed May 4 15:48:59 2016 (r299069) +++ head/sys/sparc64/sparc64/intr_machdep.c Wed May 4 15:52:40 2016 (r299070) @@ -367,7 +367,7 @@ inthand_add(const char *name, int vec, d /* * Check if we need to upgrade from PIL_ITHREAD to PIL_FILTER. * Given that apart from the on-board SCCs and UARTs shared - * interrupts are rather uncommon on sparc64 this sould be + * interrupts are rather uncommon on sparc64 this should be * pretty rare in practice. */ filter = 0;