From nobody Fri Feb 13 08:17:54 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4fC4mL6pBwz6SjFy for ; Fri, 13 Feb 2026 08:17:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R13" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4fC4mL5t9qz3fP5 for ; Fri, 13 Feb 2026 08:17:54 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770970674; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RZgNNKuX6DEIPICJQIww/yPU5kXRQsMPGpiGiY7OxYc=; b=oY+m3IgKM66TEQZwKdn0ufToASyM1U8e9ghtJYu+y6WzrrdECVMBy0oe7XWkjSxTwEMOsa NrBISVVktIXSHvrX9et3NSDPpxksEKKMFvq5HQHcFIxPKw2MANAc+tACtRAtALOb5brAgB a3k5R4eA4ox+v3D8jOL8ffCQjv+pXakVpUqx/uY7ZBzLpmGqXDplmu5OfUKj8m7FCR+6CX w1fAH4JPq6ZNdjzBJPQFxvWJvOy72KmnDBgjhCcLTIcxkbE5Xe4WkaeaYZ/+6TTErtoo2N wRw2pdXQNhmkHgxZxmfpdvH3t2ZM1JWYUtqfHS5QUrBbfgoJY4vYcQ+n0m8IOQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1770970674; a=rsa-sha256; cv=none; b=KPAojWMtStqZwPG4OiW/XNlJL8OXjwK8NU/WHDZJo3lQwTKX69mO1QWlypOmBmZbStdBzK WRD1M2lhcyU0b8QlrnB8ne8sEOUSl4aXTYdA7xQ9W/EGPOeMfORcye0setFYvovfk8HcrC 1qM50C1Jg1z/3EwmkhaiO/SvsboTKokZBpiS+YUYDd4Y2LbBT+AJaTPCy3c7Jxn8bknAFB ZCapNIlbTs3VZwtNDmAd6v6jpjBkVdP/T6RJhFPHv1lstRaCgcCOyrkN1PMXl3RKomlEEe Yit0btJfT24QJM6v/rNz08vCq4oQUb2ZL7hdfQdJneuEOv4AC6MbiO9zJ/jWkA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770970674; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RZgNNKuX6DEIPICJQIww/yPU5kXRQsMPGpiGiY7OxYc=; b=q7Wars0tJV12TdP57VC4YY+dnuNdJQKy/6ORpVgup6o0cCIFL4Y2vH6nXwYueImAIC2IB3 ezNGX7QAW0QKVratzh2mdwNhY7i+v6GzqKqfT6cZncsMdbDa+tFn+dgeI78rtfiSflgRS3 r21a5mVeBzQxVMuajm3vWSE8B9M7R/KHq+J56EjSN95xIJI5FbRrS+KIIcGoew8Vgbobep 0WLPVKbjtCAriF0SZeSXBsujZBUo7hNPgvncty8bVLiU6CFlFHGyfHPvcROVGt+A1QnW/s PnK/jm/TkyKlZ6wnkn8boMi6/SqdmynjQgZnalhngafQet3imktWm46XSCesgQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4fC4mL59Zlz1CRr for ; Fri, 13 Feb 2026 08:17:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 40137 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 13 Feb 2026 08:17:54 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Konstantin Belousov Subject: git: af99e40af1dd - main - x86: add a safe variant of MSR_OP_SCHED* operations for x86_msr_op(9) List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kib X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: af99e40af1dd4e8b39ca986240ee8b9aea722958 Auto-Submitted: auto-generated Date: Fri, 13 Feb 2026 08:17:54 +0000 Message-Id: <698ede32.40137.471593f8@gitrepo.freebsd.org> The branch main has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=af99e40af1dd4e8b39ca986240ee8b9aea722958 commit af99e40af1dd4e8b39ca986240ee8b9aea722958 Author: Konstantin Belousov AuthorDate: 2026-02-01 23:43:50 +0000 Commit: Konstantin Belousov CommitDate: 2026-02-13 07:55:04 +0000 x86: add a safe variant of MSR_OP_SCHED* operations for x86_msr_op(9) The modifier executes the operation using msr{read,write}_safe() functions instead of plain msr reads and writes. Returns EFAULT if any MSR access caused #GP. Reviewed by: markj, olce Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D55045 --- sys/x86/include/x86_var.h | 3 +- sys/x86/x86/cpu_machdep.c | 75 ++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 70 insertions(+), 8 deletions(-) diff --git a/sys/x86/include/x86_var.h b/sys/x86/include/x86_var.h index 215fe0562465..caaab207b57a 100644 --- a/sys/x86/include/x86_var.h +++ b/sys/x86/include/x86_var.h @@ -174,6 +174,7 @@ uint64_t rdtsc_ordered(void); * * All modes cause execution on the target CPU(s) with interrupts disabled. */ +#define MSR_OP_SAFE 0x08000000 #define MSR_OP_LOCAL 0x10000000 #define MSR_OP_SCHED_ALL 0x20000000 #define MSR_OP_SCHED_ONE 0x30000000 @@ -181,7 +182,7 @@ uint64_t rdtsc_ordered(void); #define MSR_OP_RENDEZVOUS_ONE 0x50000000 #define MSR_OP_CPUID(id) ((id) << 8) -void x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res); +int x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res); #if defined(__i386__) && defined(INVARIANTS) void trap_check_kstack(void); diff --git a/sys/x86/x86/cpu_machdep.c b/sys/x86/x86/cpu_machdep.c index 5f8965bd5614..023b02ba7c76 100644 --- a/sys/x86/x86/cpu_machdep.c +++ b/sys/x86/x86/cpu_machdep.c @@ -118,15 +118,60 @@ struct msr_op_arg { int op; uint64_t arg1; uint64_t *res; + bool safe; + int error; }; static void -x86_msr_op_one(void *argp) +x86_msr_op_one_safe(struct msr_op_arg *a) +{ + uint64_t v; + int error; + + error = 0; + switch (a->op) { + case MSR_OP_ANDNOT: + error = rdmsr_safe(a->msr, &v); + if (error != 0) { + atomic_cmpset_int(&a->error, 0, error); + break; + } + v &= ~a->arg1; + error = wrmsr_safe(a->msr, v); + if (error != 0) + atomic_cmpset_int(&a->error, 0, error); + break; + case MSR_OP_OR: + error = rdmsr_safe(a->msr, &v); + if (error != 0) { + atomic_cmpset_int(&a->error, 0, error); + break; + } + v |= a->arg1; + error = wrmsr_safe(a->msr, v); + if (error != 0) + atomic_cmpset_int(&a->error, 0, error); + break; + case MSR_OP_WRITE: + error = wrmsr_safe(a->msr, a->arg1); + if (error != 0) + atomic_cmpset_int(&a->error, 0, error); + break; + case MSR_OP_READ: + error = rdmsr_safe(a->msr, &v); + if (error == 0) + *a->res = v; + else + atomic_cmpset_int(&a->error, 0, error); + break; + } +} + +static void +x86_msr_op_one_unsafe(struct msr_op_arg *a) { - struct msr_op_arg *a; uint64_t v; - a = argp; switch (a->op) { case MSR_OP_ANDNOT: v = rdmsr(a->msr); @@ -150,11 +195,24 @@ x86_msr_op_one(void *argp) } } +static void +x86_msr_op_one(void *arg) +{ + struct msr_op_arg *a; + + a = arg; + if (a->safe) + x86_msr_op_one_safe(a); + else + x86_msr_op_one_unsafe(a); +} + #define MSR_OP_EXMODE_MASK 0xf0000000 #define MSR_OP_OP_MASK 0x000000ff -#define MSR_OP_GET_CPUID(x) (((x) & ~MSR_OP_EXMODE_MASK) >> 8) +#define MSR_OP_GET_CPUID(x) \ + (((x) & ~(MSR_OP_EXMODE_MASK | MSR_OP_SAFE)) >> 8) -void +int x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res) { struct thread *td; @@ -167,8 +225,10 @@ x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res) exmode = op & MSR_OP_EXMODE_MASK; a.op = op & MSR_OP_OP_MASK; a.msr = msr; + a.safe = (op & MSR_OP_SAFE) != 0; a.arg1 = arg1; a.res = res; + a.error = 0; switch (exmode) { case MSR_OP_LOCAL: @@ -209,8 +269,8 @@ x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res) thread_unlock(td); break; case MSR_OP_RENDEZVOUS_ALL: - smp_rendezvous(smp_no_rendezvous_barrier, x86_msr_op_one, - smp_no_rendezvous_barrier, &a); + smp_rendezvous(smp_no_rendezvous_barrier, + x86_msr_op_one, smp_no_rendezvous_barrier, &a); break; case MSR_OP_RENDEZVOUS_ONE: cpu = MSR_OP_GET_CPUID(op); @@ -221,6 +281,7 @@ x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res) default: __assert_unreachable(); } + return (a.error); } /*