From owner-cvs-all@FreeBSD.ORG Thu May 1 10:08:48 2003 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7687237B401; Thu, 1 May 2003 10:08:48 -0700 (PDT) Received: from harmony.village.org (rover.bsdimp.com [204.144.255.66]) by mx1.FreeBSD.org (Postfix) with ESMTP id A567B43FAF; Thu, 1 May 2003 10:08:46 -0700 (PDT) (envelope-from imp@bsdimp.com) Received: from localhost (warner@rover2.village.org [10.0.0.1]) by harmony.village.org (8.12.8/8.12.3) with ESMTP id h41H8eA7008867; Thu, 1 May 2003 11:08:40 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Thu, 01 May 2003 11:08:33 -0600 (MDT) Message-Id: <20030501.110833.25163273.imp@bsdimp.com> To: scott_long@btc.adaptec.com From: "M. Warner Losh" In-Reply-To: <3EB14AE8.1040902@btc.adaptec.com> References: <1721460000.1051803729@aslan.btc.adaptec.com> <20030501.101409.57443470.imp@bsdimp.com> <3EB14AE8.1040902@btc.adaptec.com> X-Mailer: Mew version 2.1 on Emacs 21.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit cc: src-committers@freebsd.org cc: gallatin@cs.duke.edu cc: jhb@freebsd.org cc: gibbs@scsiguy.com cc: cvs-src@freebsd.org cc: cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/dev/fxp if_fxp.c if_fxpvar.h X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 May 2003 17:08:49 -0000 > fxp_detach() > [4] LOCK > [a] write 0 to dis intr > [5] device B on same intr interrupts here > fxp_intr() > LOCK (->sleep) > [b] gone = 0; > UNLOCK > [1] if (gone) return; > [2] bus_teardown_intr(); > [3] bus_teardown_intr returns In message: <3EB14AE8.1040902@btc.adaptec.com> Scott Long writes: : In this example, is there a reason for the fxp ISR to hold the mutex : before it determines the source of the interrupt? The interrupt could well be for the fxp card, between points [4] and [a], so it would read the ISR source register, see that it is his and take the lock out. That's slightly different than my example, but still a concern. Doug Rabson has reported, when doing the initial ia64 port, that races of even one instruction in width were observed to have happened. Warner