From owner-svn-src-all@freebsd.org Fri Dec 8 03:36:14 2017 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7FD96E98A25; Fri, 8 Dec 2017 03:36:14 +0000 (UTC) (envelope-from sepherosa@gmail.com) Received: from mail-qt0-x242.google.com (mail-qt0-x242.google.com [IPv6:2607:f8b0:400d:c0d::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4161B2485; Fri, 8 Dec 2017 03:36:14 +0000 (UTC) (envelope-from sepherosa@gmail.com) Received: by mail-qt0-x242.google.com with SMTP id g10so23032648qtj.12; Thu, 07 Dec 2017 19:36:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=J3u9L4szEMvpuknnZIgRFTh8I5ZbKjT7glWofFFql28=; b=FYVfqVYg9vex7OPREBkuwHs118uRxZ+zh6WJLoABqHrAAKyaFDRGvYckQUkN5Z+d2y kX6fTXLY+dNXJlDPqI1oG/96uwIRGc0pCIFsdrnd7Be7Jw1D7abzFuHmamOQLqo2nLRr C3r+FKC3wYrJGknvp1ZheB/Q6ia1QhepXL2Gb/+GEejKmSx8shZXkCjnM3TLt+16h+Sg FzxGQflHSBipz+v8OQlVJiLeU39Rh8jhYu6k3KQus2cAbuzIqYGsEqI5zEpT/1+ubekv BQB+es+fPUWn/+fIdo6sz6IbxNj8gcXogFgl7bqMnwwUfTH+cJm//OiiiUS4XrFpy8aj C8cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=J3u9L4szEMvpuknnZIgRFTh8I5ZbKjT7glWofFFql28=; b=Teb7B/VSYxxUrOZzt22/wWfIrCGk/91EE3kcD00CeSSYiTJyOl8lvf/qqv/RuXWm61 eTj7foXWoGYKrWbf4LTKLIKTGzeRuhJzGYXXfeseoB5vTjRS4IiHMBoWR4i7SmZI29CY tPFmTRZRQzG2H0NlGDAHoS3Q7YqBze2OWgSa39tQ6yTOw3VSrtPBAr3cq6xzBgPRdNGY DjClbXauB+z+ylSQRw8cvQIu+V5S/vA2FjWT2RP1cUlXSHmQyxCDgW3r2bfJpt7Cdsso 9YGF/yd0moyYhUfVCtkurxErWKgD/xgR3nifmBX5yPeDwN5He1sSGfVu7Qq765PKfwDt kFow== X-Gm-Message-State: AKGB3mIFygv7O1IoOr0u3Bur01uDStDRr6zK6GOONQhLlCrmjE0mwm1t 3rBYb16YskmkAu1AEKMqVUQrt1GlHXthi8yOnA== X-Google-Smtp-Source: AGs4zMac39dWD9ZGb29pVL5wqxy6o+s/+axz/5XGiHIDeCPux1Mb10QNqbwSCM0XD/KPbjxArni7X5EAI9Xy2Xyyogo= X-Received: by 10.55.6.133 with SMTP id 127mr32379714qkg.219.1512704173049; Thu, 07 Dec 2017 19:36:13 -0800 (PST) MIME-Version: 1.0 Received: by 10.140.38.200 with HTTP; Thu, 7 Dec 2017 19:36:12 -0800 (PST) In-Reply-To: References: <201711300140.vAU1e7dC001292@repo.freebsd.org> <20171207100345.GA59559@FreeBSD.org> From: Sepherosa Ziehau Date: Fri, 8 Dec 2017 11:36:12 +0800 Message-ID: Subject: Re: svn commit: r326383 - head/sys/x86/cpufreq To: Andriy Gapon Cc: Alexey Dokuchaev , Jung-uk Kim , svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers , cem@freebsd.org Content-Type: text/plain; charset="UTF-8" X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Dec 2017 03:36:14 -0000 On Fri, Dec 8, 2017 at 6:23 AM, Andriy Gapon wrote: > On 07/12/2017 12:03, Alexey Dokuchaev wrote: >> On Thu, Nov 30, 2017 at 03:08:49PM -0500, Jung-uk Kim wrote: >>> ... >>> Probably. However, I am just trying to fix my FX-8350 and A10-6800 and >>> I don't have Zen processors to verify the MSRs are actually working on >>> those CPUs. >> >> Ah, that's so lovely, thanks Jung-uk; I feel that our support for AMD >> fam. 15h CPUs is lacking. E.g. only four P-states are reported for my >> A8-5550M, while it supports boosted P-states per BKDG, and reading MSRs >> directly via `sysutils/amdmsrtweaker' reports eight of them (P0 .. P7), >> with three turbo P-states P0 P1 P2. >> >> Since you have A10-6800 you might try to reproduce what I see here with >> A8-5550M. > > I think that the boosted states are supposed to be hidden from the OS. > It may be possible to query them though hardware specific registers, but they > can not be set by software directly anyway. For most of the modern Intel CPUs, boosted state is _not_ hidden from OS, it normally shows as max_freq+1, e.g. if max_freq is 3400, then the boosted state will have freq 3401. > My impression is that the proper way to observe the boost states is via APERF / > MPERF MSRs. They are useful for other things, e.g. C0 residency, too. Yeah, that's the only way to observe the current frequency of the cpu; on most of the modern Intel CPUs, P-state just sets the frequency upper limit. Thanks, sephe