From owner-svn-src-all@freebsd.org Sat Oct 31 19:30:24 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 7C30D454525; Sat, 31 Oct 2020 19:30:24 +0000 (UTC) (envelope-from wulf@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4CNq5X2hFKz3bn2; Sat, 31 Oct 2020 19:30:24 +0000 (UTC) (envelope-from wulf@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 2580DC26A; Sat, 31 Oct 2020 19:30:24 +0000 (UTC) (envelope-from wulf@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 09VJUOH9048438; Sat, 31 Oct 2020 19:30:24 GMT (envelope-from wulf@FreeBSD.org) Received: (from wulf@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 09VJUO2t048437; Sat, 31 Oct 2020 19:30:24 GMT (envelope-from wulf@FreeBSD.org) Message-Id: <202010311930.09VJUO2t048437@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: wulf set sender to wulf@FreeBSD.org using -f From: Vladimir Kondratyev Date: Sat, 31 Oct 2020 19:30:24 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r367230 - head/sys/dev/ichiic X-SVN-Group: head X-SVN-Commit-Author: wulf X-SVN-Commit-Paths: head/sys/dev/ichiic X-SVN-Commit-Revision: 367230 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 31 Oct 2020 19:30:24 -0000 Author: wulf Date: Sat Oct 31 19:30:23 2020 New Revision: 367230 URL: https://svnweb.freebsd.org/changeset/base/367230 Log: ig4(4): Add PCI IDs for Intel Comit Lake I2C controllers. MFC after: 2 weeks Modified: head/sys/dev/ichiic/ig4_pci.c Modified: head/sys/dev/ichiic/ig4_pci.c ============================================================================== --- head/sys/dev/ichiic/ig4_pci.c Sat Oct 31 19:07:32 2020 (r367229) +++ head/sys/dev/ichiic/ig4_pci.c Sat Oct 31 19:30:23 2020 (r367230) @@ -107,6 +107,20 @@ static int ig4iic_pci_detach(device_t dev); #define PCI_CHIP_CANNONLAKE_H_I2C_1 0xa3698086 #define PCI_CHIP_CANNONLAKE_H_I2C_2 0xa36a8086 #define PCI_CHIP_CANNONLAKE_H_I2C_3 0xa36b8086 +#define PCI_CHIP_COMETLAKE_LP_I2C_0 0x02e88086 +#define PCI_CHIP_COMETLAKE_LP_I2C_1 0x02e98086 +#define PCI_CHIP_COMETLAKE_LP_I2C_2 0x02ea8086 +#define PCI_CHIP_COMETLAKE_LP_I2C_3 0x02eb8086 +#define PCI_CHIP_COMETLAKE_LP_I2C_4 0x02c58086 +#define PCI_CHIP_COMETLAKE_LP_I2C_5 0x02c68086 +#define PCI_CHIP_COMETLAKE_H_I2C_0 0x06e88086 +#define PCI_CHIP_COMETLAKE_H_I2C_1 0x06e98086 +#define PCI_CHIP_COMETLAKE_H_I2C_2 0x06ea8086 +#define PCI_CHIP_COMETLAKE_H_I2C_3 0x06eb8086 +#define PCI_CHIP_COMETLAKE_V_I2C_0 0xa3e08086 +#define PCI_CHIP_COMETLAKE_V_I2C_1 0xa3e18086 +#define PCI_CHIP_COMETLAKE_V_I2C_2 0xa3e28086 +#define PCI_CHIP_COMETLAKE_V_I2C_3 0xa3e38086 struct ig4iic_pci_device { uint32_t devid; @@ -156,6 +170,20 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = { PCI_CHIP_CANNONLAKE_H_I2C_1, "Intel Cannon Lake-H I2C Controller-1", IG4_CANNONLAKE}, { PCI_CHIP_CANNONLAKE_H_I2C_2, "Intel Cannon Lake-H I2C Controller-2", IG4_CANNONLAKE}, { PCI_CHIP_CANNONLAKE_H_I2C_3, "Intel Cannon Lake-H I2C Controller-3", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_0, "Intel Comet Lake-LP I2C Controller-0", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_1, "Intel Comet Lake-LP I2C Controller-1", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_2, "Intel Comet Lake-LP I2C Controller-2", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_3, "Intel Comet Lake-LP I2C Controller-3", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_4, "Intel Comet Lake-LP I2C Controller-4", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_LP_I2C_5, "Intel Comet Lake-LP I2C Controller-5", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_H_I2C_0, "Intel Comet Lake-H I2C Controller-0", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_H_I2C_1, "Intel Comet Lake-H I2C Controller-1", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_H_I2C_2, "Intel Comet Lake-H I2C Controller-2", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_H_I2C_3, "Intel Comet Lake-H I2C Controller-3", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_V_I2C_0, "Intel Comet Lake-V I2C Controller-0", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_V_I2C_1, "Intel Comet Lake-V I2C Controller-1", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_V_I2C_2, "Intel Comet Lake-V I2C Controller-2", IG4_CANNONLAKE}, + { PCI_CHIP_COMETLAKE_V_I2C_3, "Intel Comet Lake-V I2C Controller-3", IG4_CANNONLAKE}, }; static int