From owner-svn-src-stable-7@FreeBSD.ORG Wed Jan 5 11:29:11 2011 Return-Path: Delivered-To: svn-src-stable-7@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B799B10656C0; Wed, 5 Jan 2011 11:29:10 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 531788FC14; Wed, 5 Jan 2011 11:29:10 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p05BTAIR076200; Wed, 5 Jan 2011 11:29:10 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p05BTAVs076198; Wed, 5 Jan 2011 11:29:10 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201101051129.p05BTAVs076198@svn.freebsd.org> From: Marius Strobl Date: Wed, 5 Jan 2011 11:29:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r216990 - stable/7/sys/sparc64/sparc64 X-BeenThere: svn-src-stable-7@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 7-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Jan 2011 11:29:11 -0000 Author: marius Date: Wed Jan 5 11:29:10 2011 New Revision: 216990 URL: http://svn.freebsd.org/changeset/base/216990 Log: MFC: r216891 Extend the section in which interrupts are disabled in the TLB demap functions, otherwise if we get preempted after checking whether a certain pmap is active on the current CPU but before disabling interrupts we might operate on an outdated state as the pmap might have been deactivated in the meantime. As the same issue may arises when the TLB demap function is interrupted by a TLB demap IPI, just entering a critical section before the check isn't sufficient so we have to fully disable interrupts instead. Modified: stable/7/sys/sparc64/sparc64/tlb.c Directory Properties: stable/7/sys/ (props changed) stable/7/sys/cddl/contrib/opensolaris/ (props changed) stable/7/sys/contrib/dev/acpica/ (props changed) stable/7/sys/contrib/pf/ (props changed) Modified: stable/7/sys/sparc64/sparc64/tlb.c ============================================================================== --- stable/7/sys/sparc64/sparc64/tlb.c Wed Jan 5 11:29:07 2011 (r216989) +++ stable/7/sys/sparc64/sparc64/tlb.c Wed Jan 5 11:29:10 2011 (r216990) @@ -80,15 +80,15 @@ tlb_context_demap(struct pmap *pm) */ PMAP_STATS_INC(tlb_ncontext_demap); cookie = ipi_tlb_context_demap(pm); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_context_demap: inactive pmap?")); - s = intr_disable(); stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0); flush(KERNBASE); - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); } @@ -101,6 +101,7 @@ tlb_page_demap(struct pmap *pm, vm_offse PMAP_STATS_INC(tlb_npage_demap); cookie = ipi_tlb_page_demap(pm, va); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_page_demap: inactive pmap?")); @@ -109,12 +110,11 @@ tlb_page_demap(struct pmap *pm, vm_offse else flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE; - s = intr_disable(); stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0); flush(KERNBASE); - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); } @@ -128,6 +128,7 @@ tlb_range_demap(struct pmap *pm, vm_offs PMAP_STATS_INC(tlb_nrange_demap); cookie = ipi_tlb_range_demap(pm, start, end); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_range_demap: inactive pmap?")); @@ -136,13 +137,12 @@ tlb_range_demap(struct pmap *pm, vm_offs else flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE; - s = intr_disable(); for (va = start; va < end; va += PAGE_SIZE) { stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0); flush(KERNBASE); } - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); }