From owner-svn-src-head@freebsd.org Thu Aug 16 10:00:52 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8BB2B1084A3E; Thu, 16 Aug 2018 10:00:52 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 420F579BD5; Thu, 16 Aug 2018 10:00:52 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 24DD717C4F; Thu, 16 Aug 2018 10:00:52 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w7GA0qTV073597; Thu, 16 Aug 2018 10:00:52 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w7GA0pdG073595; Thu, 16 Aug 2018 10:00:51 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201808161000.w7GA0pdG073595@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Thu, 16 Aug 2018 10:00:51 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r337903 - in head/sys/arm: arm include X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: in head/sys/arm: arm include X-SVN-Commit-Revision: 337903 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Aug 2018 10:00:52 -0000 Author: andrew Date: Thu Aug 16 10:00:51 2018 New Revision: 337903 URL: https://svnweb.freebsd.org/changeset/base/337903 Log: Remove the L1 and L2 xscale page defines and rename the generic macros to the common name. While here move the macros to check these into pmap-v4.c as they're only used there. Sponsored by: DARPA, AFRL Modified: head/sys/arm/arm/pmap-v4.c head/sys/arm/include/pmap-v4.h Modified: head/sys/arm/arm/pmap-v4.c ============================================================================== --- head/sys/arm/arm/pmap-v4.c Thu Aug 16 09:42:09 2018 (r337902) +++ head/sys/arm/arm/pmap-v4.c Thu Aug 16 10:00:51 2018 (r337903) @@ -194,6 +194,11 @@ extern struct pv_addr systempage; extern int last_fault_code; +#define l1pte_section_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_S) +#define l2pte_index(v) (((v) & L1_S_OFFSET) >> L2_S_SHIFT) +#define l2pte_valid(pte) ((pte) != 0) +#define l2pte_pa(pte) ((pte) & L2_S_FRAME) + /* * Internal function prototypes */ @@ -444,13 +449,13 @@ pmap_pte_init_generic(void) { pte_l1_s_cache_mode = L1_S_B|L1_S_C; - pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; + pte_l1_s_cache_mask = L1_S_CACHE_MASK; pte_l2_l_cache_mode = L2_B|L2_C; - pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; + pte_l2_l_cache_mask = L2_L_CACHE_MASK; pte_l2_s_cache_mode = L2_B|L2_C; - pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; + pte_l2_s_cache_mask = L2_S_CACHE_MASK; /* * If we have a write-through cache, set B and C. If Modified: head/sys/arm/include/pmap-v4.h ============================================================================== --- head/sys/arm/include/pmap-v4.h Thu Aug 16 09:42:09 2018 (r337902) +++ head/sys/arm/include/pmap-v4.h Thu Aug 16 10:00:51 2018 (r337903) @@ -249,59 +249,24 @@ extern int pmap_needs_pte_sync; /* * These macros define the various bit masks in the PTE. - * - * We use these macros since we use different bits on different processor - * models. */ -#define L1_S_CACHE_MASK_generic (L1_S_B|L1_S_C) -#define L1_S_CACHE_MASK_xscale (L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X)|\ - L1_S_XSCALE_TEX(TEX_XSCALE_T)) - -#define L2_L_CACHE_MASK_generic (L2_B|L2_C) -#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X) | \ - L2_XSCALE_L_TEX(TEX_XSCALE_T)) - -#define L2_S_PROT_U_generic (L2_AP(AP_U)) -#define L2_S_PROT_W_generic (L2_AP(AP_W)) -#define L2_S_PROT_MASK_generic (L2_S_PROT_U|L2_S_PROT_W) - -#define L2_S_PROT_U_xscale (L2_AP0(AP_U)) -#define L2_S_PROT_W_xscale (L2_AP0(AP_W)) -#define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W) - -#define L2_S_CACHE_MASK_generic (L2_B|L2_C) -#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X)| \ - L2_XSCALE_T_TEX(TEX_XSCALE_X)) - -#define L1_S_PROTO_generic (L1_TYPE_S | L1_S_IMP) -#define L1_S_PROTO_xscale (L1_TYPE_S) - -#define L1_C_PROTO_generic (L1_TYPE_C | L1_C_IMP2) -#define L1_C_PROTO_xscale (L1_TYPE_C) - +#define L1_S_CACHE_MASK (L1_S_B|L1_S_C) +#define L2_L_CACHE_MASK (L2_B|L2_C) +#define L2_S_PROT_U (L2_AP(AP_U)) +#define L2_S_PROT_W (L2_AP(AP_W)) +#define L2_S_PROT_MASK (L2_S_PROT_U|L2_S_PROT_W) +#define L2_S_CACHE_MASK (L2_B|L2_C) +#define L1_S_PROTO (L1_TYPE_S | L1_S_IMP) +#define L1_C_PROTO (L1_TYPE_C | L1_C_IMP2) #define L2_L_PROTO (L2_TYPE_L) +#define L2_S_PROTO (L2_TYPE_S) -#define L2_S_PROTO_generic (L2_TYPE_S) -#define L2_S_PROTO_xscale (L2_TYPE_XSCALE_XS) - /* * User-visible names for the ones that vary with MMU class. */ #define L2_AP(x) (L2_AP0(x) | L2_AP1(x) | L2_AP2(x) | L2_AP3(x)) -#define L2_S_PROT_U L2_S_PROT_U_generic -#define L2_S_PROT_W L2_S_PROT_W_generic -#define L2_S_PROT_MASK L2_S_PROT_MASK_generic - -#define L1_S_CACHE_MASK L1_S_CACHE_MASK_generic -#define L2_L_CACHE_MASK L2_L_CACHE_MASK_generic -#define L2_S_CACHE_MASK L2_S_CACHE_MASK_generic - -#define L1_S_PROTO L1_S_PROTO_generic -#define L1_C_PROTO L1_C_PROTO_generic -#define L2_S_PROTO L2_S_PROTO_generic - #if defined(CPU_XSCALE_81342) #define CPU_XSCALE_CORE3 #define PMAP_NEEDS_PTE_SYNC 1 @@ -383,26 +348,6 @@ void pmap_pte_init_generic(void); #define PTE_KERNEL 0 #define PTE_USER 1 -#define l1pte_valid(pde) ((pde) != 0) -#define l1pte_section_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_S) -#define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C) -#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F) - -#define l2pte_index(v) (((v) & L1_S_OFFSET) >> L2_S_SHIFT) -#define l2pte_valid(pte) ((pte) != 0) -#define l2pte_pa(pte) ((pte) & L2_S_FRAME) -#define l2pte_minidata(pte) (((pte) & \ - (L2_B | L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X)))\ - == (L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X))) - -/* L1 and L2 page table macros */ -#define pmap_pde_v(pde) l1pte_valid(*(pde)) -#define pmap_pde_section(pde) l1pte_section_p(*(pde)) -#define pmap_pde_page(pde) l1pte_page_p(*(pde)) -#define pmap_pde_fpage(pde) l1pte_fpage_p(*(pde)) - -#define pmap_pte_v(pte) l2pte_valid(*(pte)) -#define pmap_pte_pa(pte) l2pte_pa(*(pte)) /* * Flags that indicate attributes of pages or mappings of pages.