From owner-freebsd-current@FreeBSD.ORG Thu Nov 8 10:14:04 2007 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0EDC416A421 for ; Thu, 8 Nov 2007 10:14:04 +0000 (UTC) (envelope-from screwdriver@lxnt.info) Received: from mail.lxnt.info (mail.lxnt.info [217.23.143.142]) by mx1.freebsd.org (Postfix) with ESMTP id B3B7A13C4A6 for ; Thu, 8 Nov 2007 10:14:03 +0000 (UTC) (envelope-from screwdriver@lxnt.info) Received: from [217.23.131.8] (helo=lxnt.inside.caravan.ru) by mail.lxnt.info with esmtpsa (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.68 (FreeBSD)) (envelope-from ) id 1Iq4Ob-000BKE-4S; Thu, 08 Nov 2007 13:13:57 +0300 Message-ID: <4732E18A.6040802@lxnt.info> Date: Thu, 08 Nov 2007 13:14:34 +0300 From: Alexander Sabourenkov User-Agent: Thunderbird 2.0.0.6 (X11/20071024) MIME-Version: 1.0 To: =?UTF-8?B?U8O4cmVuIFNjaG1pZHQ=?= References: <47326FB8.50602@fusiongol.com> <4732CEE3.3070003@lxnt.info> <4732DA32.3090601@deepcore.dk> In-Reply-To: <4732DA32.3090601@deepcore.dk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Cc: Nathan Butcher , freebsd-current@freebsd.org Subject: Re: Remaining SATA (and other) issues X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Nov 2007 10:14:04 -0000 Søren Schmidt wrote: > You cant remove this, ATA uses the 0x54 reg to store interrupts, its a > gen purpose reg on the promises, this initialization is neededed. Hmm. Cursory greps do not show writes there neither in vendor, nor in linux drivers. I only found it in ata_piix.c from linux, as PIIX_IOCFG /* IDE I/O configuration register */. Thus I'm not sure it is really needed, but I leave that up to your expertise. > This part is wrong for older promise chips, as the port# is different. > I also have a hard time seeing that this couldd change anything since > the registers are reset etc "my way" on each interrupt. If that means ata_promise_mio_intr(), then no, it does not touch 0x60 for PRSATA2, it touches 0x54 instead. > Besides you *do not* want to pass the other bits through, they shoudl be > masked off and always written as 0's. Why then vendor does pass them through? -- ./lxnt