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From: Warner Losh <imp@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
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Subject: PERFORCE change 134570 for review
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http://perforce.freebsd.org/chv.cgi?CH=134570

Change 134570 by imp@imp_lighthouse on 2008/02/01 03:09:15

	Since this kernel is a 32-bit kernel, but one that needs to allow
	64-bit hardware access, copy the TLBMiss handler to XTLBMiss.  This
	works so long as we don't have any real 64-bit addresses to translate,
	and allows the 64-bit hardware accesses to succeed.
	
	We need to copy over the KX bit setting from the Cavium code drop, but
	this allows the bcopy that took forever to complete.

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/mips/machdep.c#20 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/machdep.c#20 (text+ko) ====

@@ -434,6 +434,12 @@
 	bcopy(MipsTLBMiss, (void *)TLB_MISS_EXC_VEC,
 	      MipsTLBMissEnd - MipsTLBMiss);
 
+#ifdef TARGET_OCTEON
+/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses  */
+	bcopy(MipsTLBMiss, (void *)XTLB_MISS_EXC_VEC,
+	      MipsTLBMissEnd - MipsTLBMiss);
+#endif
+
 	bcopy(MipsException, (void *)GEN_EXC_VEC,
 	      MipsExceptionEnd - MipsException);