Date: Wed, 26 Jun 2019 14:23:46 +0000 (UTC) From: Emmanuel Vadot <manu@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r505158 - in head/devel: . trellis trellis/files Message-ID: <201906261423.x5QENkBU082746@repo.freebsd.org>
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Author: manu Date: Wed Jun 26 14:23:46 2019 New Revision: 505158 URL: https://svnweb.freebsd.org/changeset/ports/505158 Log: devel/trellis: Add new port Project trellis document the bitstream for Lattice ECP5 FPGAs. Used with yosys and nextpnr it can create a full bitstream with only open source tools. Added: head/devel/trellis/ head/devel/trellis/Makefile (contents, props changed) head/devel/trellis/distinfo (contents, props changed) head/devel/trellis/files/ head/devel/trellis/files/patch-libtrellis_CMakeLists.txt (contents, props changed) head/devel/trellis/pkg-descr (contents, props changed) head/devel/trellis/pkg-plist (contents, props changed) Modified: head/devel/Makefile Modified: head/devel/Makefile ============================================================================== --- head/devel/Makefile Wed Jun 26 14:22:44 2019 (r505157) +++ head/devel/Makefile Wed Jun 26 14:23:46 2019 (r505158) @@ -6183,6 +6183,7 @@ SUBDIR += trac-bitten SUBDIR += tradcpp SUBDIR += treepy.el + SUBDIR += trellis SUBDIR += trio SUBDIR += truc SUBDIR += ua_parser-core Added: head/devel/trellis/Makefile ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/trellis/Makefile Wed Jun 26 14:23:46 2019 (r505158) @@ -0,0 +1,37 @@ +# $FreeBSD$ + +PORTNAME= trellis +PORTVERSION= g20190422 +CATEGORIES= devel + +MAINTAINER= manu@FreeBSD.Org +COMMENT= Documenting the Lattice ECP5 bit-stream format + +LICENSE= ISCL +LICENSE_FILE= ${WRKSRC}/COPYING + +LIB_DEPENDS= libftdi1.so:devel/libftdi1 \ + libboost_atomic.so:devel/boost-libs \ + libboost_chrono.so:devel/boost-libs \ + libboost_date_time.so:devel/boost-libs \ + libboost_filesystem.so:devel/boost-libs \ + libboost_program_options.so:devel/boost-libs \ + libboost_python${PYTHON_SUFFIX}.so:devel/boost-python-libs \ + libboost_thread.so:devel/boost-libs + +USES= compiler:c++14-lang cmake python:3.5+ shebangfix + +SHEBANG_FILES= ${WRKSRC}/timing/util/cell_html.py \ + ${WRKSRC}/timing/util/cell_timings.py + +USE_LDCONFIG= yes + +USE_GITHUB= yes +GH_ACCOUNT= SymbiFlow +GH_PROJECT= prjtrellis +GH_TAGNAME= 5eb0ad87 +GH_TUPLE= SymbiFlow:prjtrellis-db:d0b219af:database/database + +CMAKE_SOURCE_PATH= ${WRKSRC}/libtrellis + +.include <bsd.port.mk> Added: head/devel/trellis/distinfo ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/trellis/distinfo Wed Jun 26 14:23:46 2019 (r505158) @@ -0,0 +1,5 @@ +TIMESTAMP = 1559407512 +SHA256 (SymbiFlow-prjtrellis-g20190422-5eb0ad87_GH0.tar.gz) = e9611f0d3516048acd49e8f2228d13775a7fff14e41a8cb92c0e01918b3c10ff +SIZE (SymbiFlow-prjtrellis-g20190422-5eb0ad87_GH0.tar.gz) = 359933 +SHA256 (SymbiFlow-prjtrellis-db-d0b219af_GH0.tar.gz) = 88c94d6bf74f4156f07bf09f8c207f6e237e2583cca655ffd1e0ce3afd89dc16 +SIZE (SymbiFlow-prjtrellis-db-d0b219af_GH0.tar.gz) = 2361070 Added: head/devel/trellis/files/patch-libtrellis_CMakeLists.txt ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/trellis/files/patch-libtrellis_CMakeLists.txt Wed Jun 26 14:23:46 2019 (r505158) @@ -0,0 +1,11 @@ +--- libtrellis/CMakeLists.txt.orig 2019-06-03 10:33:16 UTC ++++ libtrellis/CMakeLists.txt +@@ -109,7 +109,7 @@ endif() + find_package(Boost REQUIRED COMPONENTS program_options) + + get_property(LIB64 GLOBAL PROPERTY FIND_LIBRARY_USE_LIB64_PATHS) +-if (NOT APPLE AND "${LIB64}" STREQUAL "TRUE") ++if (NOT APPLE AND "${LIB64}" STREQUAL "TRUE" AND NOT "${CMAKE_SYSTEM_NAME}" STREQUAL "FreeBSD") + set(LIBDIR "lib64") + else() + set(LIBDIR "lib") Added: head/devel/trellis/pkg-descr ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/trellis/pkg-descr Wed Jun 26 14:23:46 2019 (r505158) @@ -0,0 +1,6 @@ +Project Trellis enables a fully open-source flow for ECP5 FPGAs +using Yosys for Verilog synthesis and nextpnr for place and route. +Project Trellis itself provides the device database and tools for +bitstream creation. + +WWW: https://github.com/SymbiFlow/prjtrellis Added: head/devel/trellis/pkg-plist ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/trellis/pkg-plist Wed Jun 26 14:23:46 2019 (r505158) @@ -0,0 +1,264 @@ +bin/ecpmulti +bin/ecppack +bin/ecppll +bin/ecpunpack +lib/trellis/libtrellis.so +lib/trellis/pytrellis.so +%%DATADIR%%/database/.gitignore +%%DATADIR%%/database/COPYING +%%DATADIR%%/database/ECP5/LFE5U-25F/globals.json +%%DATADIR%%/database/ECP5/LFE5U-25F/iodb.json +%%DATADIR%%/database/ECP5/LFE5U-25F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5U-45F/globals.json +%%DATADIR%%/database/ECP5/LFE5U-45F/iodb.json +%%DATADIR%%/database/ECP5/LFE5U-45F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5U-85F/globals.json +%%DATADIR%%/database/ECP5/LFE5U-85F/iodb.json +%%DATADIR%%/database/ECP5/LFE5U-85F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM-25F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM-25F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM-25F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM-45F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM-45F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM-45F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM-85F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM-85F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM-85F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM5G-25F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM5G-25F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM5G-25F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM5G-45F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM5G-45F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM5G-45F/tilegrid.json +%%DATADIR%%/database/ECP5/LFE5UM5G-85F/globals.json +%%DATADIR%%/database/ECP5/LFE5UM5G-85F/iodb.json +%%DATADIR%%/database/ECP5/LFE5UM5G-85F/tilegrid.json +%%DATADIR%%/database/ECP5/tiledata/BANKREF0/bits.db +%%DATADIR%%/database/ECP5/tiledata/BANKREF1/bits.db +%%DATADIR%%/database/ECP5/tiledata/BANKREF2/bits.db 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