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From: Olivier Houchard <cognet@FreeBSD.org>
Date: Sat, 5 Nov 2011 19:58:05 +0000 (UTC)
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Subject: svn commit: r227119 - projects/armv6/sys/arm/arm
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Author: cognet
Date: Sat Nov  5 19:58:05 2011
New Revision: 227119
URL: http://svn.freebsd.org/changeset/base/227119

Log:
  When handling bounce pages, on POSTREAD, invalidate cache for all bounce
  pages, not just the first one.
  Also, make sure the address and the size are dataline cache size aligned,
  it should be ok to invalidate before and after the buffer, as long as it
  stays in the bounce page, as those bits aren't supposed to be used anyway.

Modified:
  projects/armv6/sys/arm/arm/busdma_machdep-v6.c

Modified: projects/armv6/sys/arm/arm/busdma_machdep-v6.c
==============================================================================
--- projects/armv6/sys/arm/arm/busdma_machdep-v6.c	Sat Nov  5 19:25:21 2011	(r227118)
+++ projects/armv6/sys/arm/arm/busdma_machdep-v6.c	Sat Nov  5 19:58:05 2011	(r227119)
@@ -1157,6 +1157,22 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus
 			    (vm_offset_t)bpage->busaddr,
 			    bpage->datacount);
 			while (bpage != NULL) {
+				vm_offset_t startv;
+				vm_paddr_t startp;
+				int len;
+
+				startv = bpage->vaddr &~ arm_dcache_align_mask;
+				startp = bpage->busaddr &~ arm_dcache_align_mask;
+				len = bpage->datacount;
+				
+				if (startv != bpage->vaddr)
+					len += bpage->vaddr & arm_dcache_align_mask;
+				if (len & arm_dcache_align_mask) 
+					len = (len -
+					    (len & arm_dcache_align_mask)) +
+					    arm_dcache_align;
+				cpu_dcache_inv_range(startv, len);
+				l2cache_inv_range(startv, startp, len);
 				bcopy((void *)bpage->vaddr,
 				      (void *)bpage->datavaddr,
 				      bpage->datacount);