From owner-svn-src-head@freebsd.org Tue Sep 5 15:19:15 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D4E4AE0E2AA; Tue, 5 Sep 2017 15:19:15 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id AAECE8199B; Tue, 5 Sep 2017 15:19:15 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v85FJECQ016673; Tue, 5 Sep 2017 15:19:14 GMT (envelope-from cem@FreeBSD.org) Received: (from cem@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v85FJE8P016669; Tue, 5 Sep 2017 15:19:14 GMT (envelope-from cem@FreeBSD.org) Message-Id: <201709051519.v85FJE8P016669@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cem set sender to cem@FreeBSD.org using -f From: Conrad Meyer Date: Tue, 5 Sep 2017 15:19:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323185 - in head: share/man/man4 sys/conf sys/dev/amdtemp X-SVN-Group: head X-SVN-Commit-Author: cem X-SVN-Commit-Paths: in head: share/man/man4 sys/conf sys/dev/amdtemp X-SVN-Commit-Revision: 323185 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Sep 2017 15:19:16 -0000 Author: cem Date: Tue Sep 5 15:19:14 2017 New Revision: 323185 URL: https://svnweb.freebsd.org/changeset/base/323185 Log: amdtemp(4): Add support for Family 17h temperature sensor The sensor value is formatted similarly to previous models (same bitfield sizes, same units), but must be read off of the internal System Management Network (SMN) from the System Management Unit (SMU) co-processor. PR: 218264 Reported and tested by: Nils Beyer Reviewed by: avg (no +1), mjoras, truckman Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12217 Modified: head/share/man/man4/amdtemp.4 head/sys/conf/files.amd64 head/sys/conf/files.i386 head/sys/dev/amdtemp/amdtemp.c Modified: head/share/man/man4/amdtemp.4 ============================================================================== --- head/share/man/man4/amdtemp.4 Tue Sep 5 15:13:41 2017 (r323184) +++ head/share/man/man4/amdtemp.4 Tue Sep 5 15:19:14 2017 (r323185) @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd August 31, 2017 +.Dd September 5, 2017 .Dt AMDTEMP 4 .Os .Sh NAME @@ -53,7 +53,7 @@ The driver provides support for the on-die digital thermal sensor present in .Tn AMD -Family 0Fh, 10h, 11h, 12h, 14h, 15h, and 16h processors. +Family 0Fh, 10h, 11h, 12h, 14h, 15h, 16h, and 17h processors. .Pp For Family 0Fh processors, the .Nm @@ -64,8 +64,8 @@ The driver also creates in the corresponding CPU device's sysctl tree, displaying the maximum temperature of the two sensors located in each CPU core. .Pp -For Family 10h, 11h, 12h, 14h, 15h, and 16h processors, the driver reports each -package's temperature through a sysctl node, named +For Family 10h, 11h, 12h, 14h, 15h, 16h, and 17h processors, the driver reports +each package's temperature through a sysctl node, named .Va dev.amdtemp.%d.core0.sensor0 . The driver also creates .Va dev.cpu.%d.temperature Modified: head/sys/conf/files.amd64 ============================================================================== --- head/sys/conf/files.amd64 Tue Sep 5 15:13:41 2017 (r323184) +++ head/sys/conf/files.amd64 Tue Sep 5 15:19:14 2017 (r323185) @@ -198,7 +198,7 @@ dev/agp/agp_amd64.c optional agp dev/agp/agp_i810.c optional agp dev/agp/agp_via.c optional agp dev/amdsbwd/amdsbwd.c optional amdsbwd -dev/amdsmn/amdsmn.c optional amdsmn +dev/amdsmn/amdsmn.c optional amdsmn | amdtemp dev/amdtemp/amdtemp.c optional amdtemp dev/arcmsr/arcmsr.c optional arcmsr pci dev/asmc/asmc.c optional asmc isa Modified: head/sys/conf/files.i386 ============================================================================== --- head/sys/conf/files.i386 Tue Sep 5 15:13:41 2017 (r323184) +++ head/sys/conf/files.i386 Tue Sep 5 15:19:14 2017 (r323185) @@ -152,7 +152,7 @@ dev/agp/agp_sis.c optional agp dev/agp/agp_via.c optional agp dev/aic/aic_isa.c optional aic isa dev/amdsbwd/amdsbwd.c optional amdsbwd -dev/amdsmn/amdsmn.c optional amdsmn +dev/amdsmn/amdsmn.c optional amdsmn | amdtemp dev/amdtemp/amdtemp.c optional amdtemp dev/arcmsr/arcmsr.c optional arcmsr pci dev/asmc/asmc.c optional asmc isa Modified: head/sys/dev/amdtemp/amdtemp.c ============================================================================== --- head/sys/dev/amdtemp/amdtemp.c Tue Sep 5 15:13:41 2017 (r323184) +++ head/sys/dev/amdtemp/amdtemp.c Tue Sep 5 15:19:14 2017 (r323185) @@ -49,6 +49,8 @@ __FBSDID("$FreeBSD$"); #include #include +#include + typedef enum { CORE0_SENSOR0, CORE0_SENSOR1, @@ -59,7 +61,6 @@ typedef enum { } amdsensor_t; struct amdtemp_softc { - device_t sc_dev; int sc_ncores; int sc_ntemps; int sc_flags; @@ -70,6 +71,7 @@ struct amdtemp_softc { int32_t (*sc_gettemp)(device_t, amdsensor_t); struct sysctl_oid *sc_sysctl_cpu[MAXCPU]; struct intr_config_hook sc_ich; + device_t sc_smn; }; #define VENDORID_AMD 0x1022 @@ -82,6 +84,7 @@ struct amdtemp_softc { #define DEVICEID_AMD_MISC16 0x1533 #define DEVICEID_AMD_MISC16_M30H 0x1583 #define DEVICEID_AMD_MISC17 0x141d +#define DEVICEID_AMD_HOSTB17H 0x1450 static struct amdtemp_product { uint16_t amdtemp_vendorid; @@ -96,6 +99,7 @@ static struct amdtemp_product { { VENDORID_AMD, DEVICEID_AMD_MISC16 }, { VENDORID_AMD, DEVICEID_AMD_MISC16_M30H }, { VENDORID_AMD, DEVICEID_AMD_MISC17 }, + { VENDORID_AMD, DEVICEID_AMD_HOSTB17H }, { 0, 0 } }; @@ -105,6 +109,11 @@ static struct amdtemp_product { #define AMDTEMP_REPTMP_CTRL 0xa4 /* + * Reported Temperature, Family 17h + */ +#define AMDTEMP_17H_CUR_TMP 0x59800 + +/* * Thermaltrip Status Register (Family 0Fh only) */ #define AMDTEMP_THERMTP_STAT 0xe4 @@ -133,6 +142,7 @@ static int amdtemp_detach(device_t dev); static int amdtemp_match(device_t dev); static int32_t amdtemp_gettemp0f(device_t dev, amdsensor_t sensor); static int32_t amdtemp_gettemp(device_t dev, amdsensor_t sensor); +static int32_t amdtemp_gettemp17h(device_t dev, amdsensor_t sensor); static int amdtemp_sysctl(SYSCTL_HANDLER_ARGS); static device_method_t amdtemp_methods[] = { @@ -153,6 +163,8 @@ static driver_t amdtemp_driver = { static devclass_t amdtemp_devclass; DRIVER_MODULE(amdtemp, hostb, amdtemp_driver, amdtemp_devclass, NULL, NULL); +MODULE_VERSION(amdtemp, 1); +MODULE_DEPEND(amdtemp, amdsmn, 1, 1, 1); static int amdtemp_match(device_t dev) @@ -211,6 +223,7 @@ amdtemp_probe(device_t dev) case 0x14: case 0x15: case 0x16: + case 0x17: break; default: return (ENXIO); @@ -240,7 +253,7 @@ amdtemp_attach(device_t dev) cpuid = cpu_id; family = CPUID_TO_FAMILY(cpuid); model = CPUID_TO_MODEL(cpuid); - if (family != 0x0f || model >= 0x40) { + if ((family != 0x0f || model >= 0x40) && family != 0x17) { cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4); family = CPUID_TO_FAMILY(cpuid); model = CPUID_TO_MODEL(cpuid); @@ -342,6 +355,17 @@ amdtemp_attach(device_t dev) sc->sc_gettemp = amdtemp_gettemp; break; + case 0x17: + sc->sc_ntemps = 1; + sc->sc_gettemp = amdtemp_gettemp17h; + sc->sc_smn = device_find_child( + device_get_parent(dev), "amdsmn", -1); + if (sc->sc_smn == NULL) { + if (bootverbose) + device_printf(dev, "No SMN device found\n"); + return (ENXIO); + } + break; } /* Find number of cores per package. */ @@ -552,6 +576,22 @@ amdtemp_gettemp(device_t dev, amdsensor_t sensor) uint32_t temp; temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4); + temp = ((temp >> 21) & 0x7ff) * 5 / 4; + temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10; + + return (temp); +} + +static int32_t +amdtemp_gettemp17h(device_t dev, amdsensor_t sensor) +{ + struct amdtemp_softc *sc = device_get_softc(dev); + uint32_t temp; + int error; + + error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &temp); + KASSERT(error == 0, ("amdsmn_read")); + temp = ((temp >> 21) & 0x7ff) * 5 / 4; temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;