From owner-p4-projects@FreeBSD.ORG Fri Jan 25 14:18:05 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id ECDA516A469; Fri, 25 Jan 2008 14:18:04 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 995D816A420 for ; Fri, 25 Jan 2008 14:18:04 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 94B2C13C46E for ; Fri, 25 Jan 2008 14:18:04 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m0PEI4V7039505 for ; Fri, 25 Jan 2008 14:18:04 GMT (envelope-from rrs@cisco.com) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m0PEI4VY039502 for perforce@freebsd.org; Fri, 25 Jan 2008 14:18:04 GMT (envelope-from rrs@cisco.com) Date: Fri, 25 Jan 2008 14:18:04 GMT Message-Id: <200801251418.m0PEI4VY039502@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rrs@cisco.com using -f From: "Randall R. Stewart" To: Perforce Change Reviews Cc: Subject: PERFORCE change 134084 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Jan 2008 14:18:05 -0000 http://perforce.freebsd.org/chv.cgi?CH=134084 Change 134084 by rrs@rrs-mips2-jnpr on 2008/01/25 14:17:32 s9indent of the uart_dev_oct transfered over. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#2 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#2 (text+ko) ==== @@ -85,7 +85,7 @@ * that may have been received gets lost here. */ static void -oct16550_clrint (struct uart_bas *bas) +oct16550_clrint(struct uart_bas *bas) { uint8_t iir; @@ -98,8 +98,8 @@ (void)uart_getreg(bas, REG_DATA); else if (iir == IIR_MLSC) (void)uart_getreg(bas, REG_MSR); - else if (iir == IIR_BUSY) - (void) uart_getreg(bas, REG_USR); + else if (iir == IIR_BUSY) + (void)uart_getreg(bas, REG_USR); uart_barrier(bas); iir = uart_getreg(bas, REG_IIR); } @@ -108,14 +108,15 @@ static int delay_changed = 1; static int -oct16550_delay (struct uart_bas *bas) +oct16550_delay(struct uart_bas *bas) { int divisor; u_char lcr; - static int delay = 0; + static int delay = 0; - if (!delay_changed) return delay; - delay_changed = 0; + if (!delay_changed) + return delay; + delay_changed = 0; lcr = uart_getreg(bas, REG_LCR); uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); uart_barrier(bas); @@ -123,9 +124,9 @@ uart_barrier(bas); uart_setreg(bas, REG_LCR, lcr); uart_barrier(bas); - - if(!bas->rclk) - return 10; /* return an approx delay value */ + + if (!bas->rclk) + return 10; /* return an approx delay value */ /* 1/10th the time to transmit 1 character (estimate). */ if (divisor <= 134) @@ -135,7 +136,7 @@ } static int -oct16550_divisor (int rclk, int baudrate) +oct16550_divisor(int rclk, int baudrate) { int actual_baud, divisor; int error; @@ -159,7 +160,7 @@ } static int -oct16550_drain (struct uart_bas *bas, int what) +oct16550_drain(struct uart_bas *bas, int what) { int delay, limit; @@ -167,29 +168,31 @@ if (what & UART_DRAIN_TRANSMITTER) { /* - * Pick an arbitrary high limit to avoid getting stuck in - * an infinite loop when the hardware is broken. Make the - * limit high enough to handle large FIFOs. + * Pick an arbitrary high limit to avoid getting stuck in an + * infinite loop when the hardware is broken. Make the limit + * high enough to handle large FIFOs. */ - limit = 10*10*10*1024; + limit = 10 * 10 * 10 * 1024; while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) DELAY(delay); if (limit == 0) { - /* printf("oct16550: transmitter appears stuck... "); */ + /* + * printf("oct16550: transmitter appears stuck... + * "); + */ return (0); } } - if (what & UART_DRAIN_RECEIVER) { /* - * Pick an arbitrary high limit to avoid getting stuck in - * an infinite loop when the hardware is broken. Make the - * limit high enough to handle large FIFOs and integrated - * UARTs. The HP rx2600 for example has 3 UARTs on the - * management board that tend to get a lot of data send - * to it when the UART is first activated. + * Pick an arbitrary high limit to avoid getting stuck in an + * infinite loop when the hardware is broken. Make the limit + * high enough to handle large FIFOs and integrated UARTs. + * The HP rx2600 for example has 3 UARTs on the management + * board that tend to get a lot of data send to it when the + * UART is first activated. */ - limit=10*4096; + limit = 10 * 4096; while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { (void)uart_getreg(bas, REG_DATA); uart_barrier(bas); @@ -200,7 +203,6 @@ return (EIO); } } - return (0); } @@ -209,7 +211,7 @@ * drained. WARNING: this function clobbers the FIFO setting! */ static void -oct16550_flush (struct uart_bas *bas, int what) +oct16550_flush(struct uart_bas *bas, int what) { uint8_t fcr; @@ -223,7 +225,7 @@ } static int -oct16550_param (struct uart_bas *bas, int baudrate, int databits, int stopbits, +oct16550_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, int parity) { int divisor; @@ -252,9 +254,8 @@ uart_setreg(bas, REG_DLL, divisor & 0xff); uart_setreg(bas, REG_DLH, (divisor >> 8) & 0xff); uart_barrier(bas); - delay_changed = 1; + delay_changed = 1; } - /* Set LCR and clear DLAB. */ uart_setreg(bas, REG_LCR, lcr); uart_barrier(bas); @@ -281,7 +282,7 @@ }; static int -oct16550_probe (struct uart_bas *bas) +oct16550_probe(struct uart_bas *bas) { u_char val; @@ -293,16 +294,16 @@ if (val & 0xc0) return (ENXIO); val = uart_getreg(bas, REG_USR); - if (val & 0xe0) - return (ENXIO); + if (val & 0xe0) + return (ENXIO); return (0); } static void -oct16550_init (struct uart_bas *bas, int baudrate, int databits, int stopbits, +oct16550_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, int parity) { - u_char ier; + u_char ier; oct16550_param(bas, baudrate, databits, stopbits, parity); @@ -312,7 +313,7 @@ uart_barrier(bas); /* Disable the FIFO (if present). */ -// uart_setreg(bas, REG_FCR, 0); + //uart_setreg(bas, REG_FCR, 0); uart_barrier(bas); /* Set RTS & DTR. */ @@ -323,7 +324,7 @@ } static void -oct16550_term (struct uart_bas *bas) +oct16550_term(struct uart_bas *bas) { /* Clear RTS & DTR. */ @@ -331,35 +332,36 @@ uart_barrier(bas); } -static inline void oct16550_wait_txhr_empty (struct uart_bas *bas, int limit, int delay) +static inline void +oct16550_wait_txhr_empty(struct uart_bas *bas, int limit, int delay) { - while (((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) && - ((uart_getreg(bas, REG_USR) & USR_TXFIFO_NOTFULL) == 0) && --limit) - DELAY(delay); + while (((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) && + ((uart_getreg(bas, REG_USR) & USR_TXFIFO_NOTFULL) == 0) && --limit) + DELAY(delay); } static void -oct16550_putc (struct uart_bas *bas, int c) +oct16550_putc(struct uart_bas *bas, int c) { int delay; /* 1/10th the time to transmit 1 character (estimate). */ delay = oct16550_delay(bas); - oct16550_wait_txhr_empty(bas, 100, delay); + oct16550_wait_txhr_empty(bas, 100, delay); uart_setreg(bas, REG_DATA, c); uart_barrier(bas); - oct16550_wait_txhr_empty(bas, 100, delay); + oct16550_wait_txhr_empty(bas, 100, delay); } static int -oct16550_rxready (struct uart_bas *bas) +oct16550_rxready(struct uart_bas *bas) { return ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) != 0 ? 1 : 0); } static int -oct16550_getc (struct uart_bas *bas, struct mtx *hwmtx) +oct16550_getc(struct uart_bas *bas, struct mtx *hwmtx) { int c, delay; @@ -386,9 +388,9 @@ */ struct oct16550_softc { struct uart_softc base; - uint8_t fcr; - uint8_t ier; - uint8_t mcr; + uint8_t fcr; + uint8_t ier; + uint8_t mcr; }; static int oct16550_bus_attach(struct uart_softc *); @@ -404,18 +406,18 @@ static int oct16550_bus_transmit(struct uart_softc *); static kobj_method_t oct16550_methods[] = { - KOBJMETHOD(uart_attach, oct16550_bus_attach), - KOBJMETHOD(uart_detach, oct16550_bus_detach), - KOBJMETHOD(uart_flush, oct16550_bus_flush), - KOBJMETHOD(uart_getsig, oct16550_bus_getsig), - KOBJMETHOD(uart_ioctl, oct16550_bus_ioctl), - KOBJMETHOD(uart_ipend, oct16550_bus_ipend), - KOBJMETHOD(uart_param, oct16550_bus_param), - KOBJMETHOD(uart_probe, oct16550_bus_probe), - KOBJMETHOD(uart_receive, oct16550_bus_receive), - KOBJMETHOD(uart_setsig, oct16550_bus_setsig), - KOBJMETHOD(uart_transmit, oct16550_bus_transmit), - { 0, 0 } + KOBJMETHOD(uart_attach, oct16550_bus_attach), + KOBJMETHOD(uart_detach, oct16550_bus_detach), + KOBJMETHOD(uart_flush, oct16550_bus_flush), + KOBJMETHOD(uart_getsig, oct16550_bus_getsig), + KOBJMETHOD(uart_ioctl, oct16550_bus_ioctl), + KOBJMETHOD(uart_ipend, oct16550_bus_ipend), + KOBJMETHOD(uart_param, oct16550_bus_param), + KOBJMETHOD(uart_probe, oct16550_bus_probe), + KOBJMETHOD(uart_receive, oct16550_bus_receive), + KOBJMETHOD(uart_setsig, oct16550_bus_setsig), + KOBJMETHOD(uart_transmit, oct16550_bus_transmit), + {0, 0} }; struct uart_class uart_oct16550_class = { @@ -435,21 +437,21 @@ } static int -oct16550_bus_attach (struct uart_softc *sc) +oct16550_bus_attach(struct uart_softc *sc) { - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; + struct oct16550_softc *oct16550 = (struct oct16550_softc *)sc; struct uart_bas *bas; - int unit; + int unit; - unit = device_get_unit(sc->sc_dev); + unit = device_get_unit(sc->sc_dev); bas = &sc->sc_bas; - oct16550_drain(bas, UART_DRAIN_TRANSMITTER); + oct16550_drain(bas, UART_DRAIN_TRANSMITTER); oct16550->mcr = uart_getreg(bas, REG_MCR); oct16550->fcr = FCR_ENABLE | FCR_RX_HIGH; uart_setreg(bas, REG_FCR, oct16550->fcr); uart_barrier(bas); - oct16550_bus_flush(sc, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER); + oct16550_bus_flush(sc, UART_FLUSH_RECEIVER | UART_FLUSH_TRANSMITTER); if (oct16550->mcr & MCR_DTR) sc->sc_hwsig |= SER_DTR; @@ -466,13 +468,13 @@ /* * Enable the interrupt in CIU. // UART-x2 @ IP2 */ - ciu_enable_interrupts(0, CIU_INT_0, CIU_EN_0, - (!unit) ? CIU_UART_BITS_UART0 : CIU_UART_BITS_UART1, CIU_MIPS_IP2); + ciu_enable_interrupts(0, CIU_INT_0, CIU_EN_0, + (!unit) ? CIU_UART_BITS_UART0 : CIU_UART_BITS_UART1, CIU_MIPS_IP2); return (0); } static int -oct16550_bus_detach (struct uart_softc *sc) +oct16550_bus_detach(struct uart_softc *sc) { struct uart_bas *bas; u_char ier; @@ -486,9 +488,9 @@ } static int -oct16550_bus_flush (struct uart_softc *sc, int what) +oct16550_bus_flush(struct uart_softc *sc, int what) { - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; + struct oct16550_softc *oct16550 = (struct oct16550_softc *)sc; struct uart_bas *bas; int error; @@ -506,7 +508,7 @@ } static int -oct16550_bus_getsig (struct uart_softc *sc) +oct16550_bus_getsig(struct uart_softc *sc) { uint32_t new, old, sig; uint8_t msr; @@ -520,14 +522,14 @@ SIGCHG(msr & MSR_DSR, sig, SER_DSR, SER_DDSR); SIGCHG(msr & MSR_CTS, sig, SER_CTS, SER_DCTS); SIGCHG(msr & MSR_DCD, sig, SER_DCD, SER_DDCD); - SIGCHG(msr & MSR_RI, sig, SER_RI, SER_DRI); + SIGCHG(msr & MSR_RI, sig, SER_RI, SER_DRI); new = sig & ~SER_MASK_DELTA; } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); return (sig); } static int -oct16550_bus_ioctl (struct uart_softc *sc, int request, intptr_t data) +oct16550_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) { struct uart_bas *bas; int baudrate, divisor, error; @@ -586,9 +588,9 @@ uart_setreg(bas, REG_LCR, lcr); uart_barrier(bas); baudrate = (divisor > 0) ? bas->rclk / divisor / 16 : 0; - delay_changed = 1; + delay_changed = 1; if (baudrate > 0) - *(int*)data = baudrate; + *(int *)data = baudrate; else error = ENXIO; break; @@ -614,38 +616,39 @@ iir = uart_getreg(bas, REG_IIR) & IIR_IMASK; if (iir != IIR_NOPEND) { - if (iir == IIR_RLS) { - lsr = uart_getreg(bas, REG_LSR); - if (lsr & LSR_OE) - ipend |= SER_INT_OVERRUN; - if (lsr & LSR_BI) - ipend |= SER_INT_BREAK; - if (lsr & LSR_RXRDY) - ipend |= SER_INT_RXREADY; + if (iir == IIR_RLS) { + lsr = uart_getreg(bas, REG_LSR); + if (lsr & LSR_OE) + ipend |= SER_INT_OVERRUN; + if (lsr & LSR_BI) + ipend |= SER_INT_BREAK; + if (lsr & LSR_RXRDY) + ipend |= SER_INT_RXREADY; - } else if (iir == IIR_RXRDY) { - ipend |= SER_INT_RXREADY; + } else if (iir == IIR_RXRDY) { + ipend |= SER_INT_RXREADY; - } else if (iir == IIR_RXTOUT) { - ipend |= SER_INT_RXREADY; + } else if (iir == IIR_RXTOUT) { + ipend |= SER_INT_RXREADY; - } else if (iir == IIR_TXRDY) { - ipend |= SER_INT_TXIDLE; + } else if (iir == IIR_TXRDY) { + ipend |= SER_INT_TXIDLE; - } else if (iir == IIR_MLSC) { - ipend |= SER_INT_SIGCHG; + } else if (iir == IIR_MLSC) { + ipend |= SER_INT_SIGCHG; - } else if (iir == IIR_BUSY) { - (void) uart_getreg(bas, REG_USR); - } + } else if (iir == IIR_BUSY) { + (void)uart_getreg(bas, REG_USR); + } } uart_unlock(sc->sc_hwmtx); #define OCTEON_VISUAL_UART 1 #ifdef OCTEON_VISUAL_UART - static int where1 = 0; + static int where1 = 0; - if (ipend) octeon_led_run_wheel(&where1, 6 + device_get_unit(sc->sc_dev)); + if (ipend) + octeon_led_run_wheel(&where1, 6 + device_get_unit(sc->sc_dev)); #endif return ((sc->sc_leaving) ? 0 : ipend); @@ -655,7 +658,7 @@ static int -oct16550_bus_param (struct uart_softc *sc, int baudrate, int databits, +oct16550_bus_param(struct uart_softc *sc, int baudrate, int databits, int stopbits, int parity) { struct uart_bas *bas; @@ -669,7 +672,7 @@ } static int -oct16550_bus_probe (struct uart_softc *sc) +oct16550_bus_probe(struct uart_softc *sc) { struct uart_bas *bas; int error; @@ -680,8 +683,7 @@ error = oct16550_probe(bas); if (error) { return (error); - } - + } uart_setreg(bas, REG_MCR, (MCR_DTR | MCR_RTS)); /* @@ -689,20 +691,20 @@ * done. Since this is the first time we enable the FIFOs, we reset * them. */ - oct16550_drain(bas, UART_DRAIN_TRANSMITTER); + oct16550_drain(bas, UART_DRAIN_TRANSMITTER); #define ENABLE_OCTEON_FIFO 1 #ifdef ENABLE_OCTEON_FIFO uart_setreg(bas, REG_FCR, FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST); #endif uart_barrier(bas); - oct16550_flush(bas, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER); + oct16550_flush(bas, UART_FLUSH_RECEIVER | UART_FLUSH_TRANSMITTER); - if (device_get_unit(sc->sc_dev)) { - device_set_desc(sc->sc_dev, "Octeon-16550 channel 1"); - } else { - device_set_desc(sc->sc_dev, "Octeon-16550 channel 0"); - } + if (device_get_unit(sc->sc_dev)) { + device_set_desc(sc->sc_dev, "Octeon-16550 channel 1"); + } else { + device_set_desc(sc->sc_dev, "Octeon-16550 channel 0"); + } #ifdef ENABLE_OCTEON_FIFO sc->sc_rxfifosz = 64; sc->sc_txfifosz = 64; @@ -716,8 +718,8 @@ /* * XXX there are some issues related to hardware flow control and * it's likely that uart(4) is the cause. This basicly needs more - * investigation, but we avoid using for hardware flow control - * until then. + * investigation, but we avoid using for hardware flow control until + * then. */ /* 16650s or higher have automatic flow control. */ if (sc->sc_rxfifosz > 16) { @@ -730,7 +732,7 @@ } static int -oct16550_bus_receive (struct uart_softc *sc) +oct16550_bus_receive(struct uart_softc *sc) { struct uart_bas *bas; int xc; @@ -754,24 +756,24 @@ lsr = uart_getreg(bas, REG_LSR); } /* Discard everything left in the Rx FIFO. */ - /* - * First do a read/discard anyway, in case the UART was lying to us. - * This was seen, when IIR said RBR, but LSR said no RXRDY - */ - (void)uart_getreg(bas, REG_DATA); + /* + * First do a read/discard anyway, in case the UART was lying to us. + * This was seen, when IIR said RBR, but LSR said no RXRDY + */ + (void)uart_getreg(bas, REG_DATA); while (lsr & LSR_RXRDY) { (void)uart_getreg(bas, REG_DATA); uart_barrier(bas); lsr = uart_getreg(bas, REG_LSR); } uart_unlock(sc->sc_hwmtx); - return (0); + return (0); } static int -oct16550_bus_setsig (struct uart_softc *sc, int sig) +oct16550_bus_setsig(struct uart_softc *sc, int sig) { - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; + struct oct16550_softc *oct16550 = (struct oct16550_softc *)sc; struct uart_bas *bas; uint32_t new, old; @@ -789,7 +791,7 @@ } } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); uart_lock(sc->sc_hwmtx); - oct16550->mcr &= ~(MCR_DTR|MCR_RTS); + oct16550->mcr &= ~(MCR_DTR | MCR_RTS); if (new & SER_DTR) oct16550->mcr |= MCR_DTR; if (new & SER_RTS) @@ -801,21 +803,21 @@ } static int -oct16550_bus_transmit (struct uart_softc *sc) +oct16550_bus_transmit(struct uart_softc *sc) { - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; + struct oct16550_softc *oct16550 = (struct oct16550_softc *)sc; struct uart_bas *bas; int i; bas = &sc->sc_bas; uart_lock(sc->sc_hwmtx); #ifdef NO_UART_INTERRUPTS - for (i = 0; i < sc->sc_txdatasz; i++) { - oct16550_putc(bas, sc->sc_txbuf[i]); - } + for (i = 0; i < sc->sc_txdatasz; i++) { + oct16550_putc(bas, sc->sc_txbuf[i]); + } #else - oct16550_wait_txhr_empty(bas, 100, oct16550_delay(bas)); + oct16550_wait_txhr_empty(bas, 100, oct16550_delay(bas)); uart_setreg(bas, REG_IER, oct16550->ier | IER_ETXRDY); uart_barrier(bas);