From owner-svn-src-head@freebsd.org Thu May 12 12:13:29 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id AEF4BB2EDB1; Thu, 12 May 2016 12:13:29 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 85E421115; Thu, 12 May 2016 12:13:29 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u4CCDSVS093272; Thu, 12 May 2016 12:13:28 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u4CCDS5V093271; Thu, 12 May 2016 12:13:28 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201605121213.u4CCDS5V093271@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Thu, 12 May 2016 12:13:28 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r299532 - head/sys/arm64/arm64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2016 12:13:29 -0000 Author: andrew Date: Thu May 12 12:13:28 2016 New Revision: 299532 URL: https://svnweb.freebsd.org/changeset/base/299532 Log: Restrict the memory barriers in bus_dmamap_sync to just the operations where it's needed. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Modified: head/sys/arm64/arm64/busdma_bounce.c Modified: head/sys/arm64/arm64/busdma_bounce.c ============================================================================== --- head/sys/arm64/arm64/busdma_bounce.c Thu May 12 12:03:27 2016 (r299531) +++ head/sys/arm64/arm64/busdma_bounce.c Thu May 12 12:13:28 2016 (r299532) @@ -799,12 +799,6 @@ bounce_bus_dmamap_sync(bus_dma_tag_t dma struct bounce_page *bpage; vm_offset_t datavaddr, tempvaddr; - if ((bpage = STAILQ_FIRST(&map->bpages)) == NULL) { - /* Wait for any memory access to complete */ - dsb(sy); - return; - } - /* * XXX ARM64TODO: * This bus_dma implementation requires IO-Coherent architecutre. @@ -812,56 +806,63 @@ bounce_bus_dmamap_sync(bus_dma_tag_t dma * added to this function. */ - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " - "performing bounce", __func__, dmat, dmat->common.flags, op); - - if ((op & BUS_DMASYNC_PREWRITE) != 0) { - while (bpage != NULL) { - tempvaddr = 0; - datavaddr = bpage->datavaddr; - if (datavaddr == 0) { - tempvaddr = - pmap_quick_enter_page(bpage->datapage); - datavaddr = tempvaddr | bpage->dataoffs; - } - - bcopy((void *)datavaddr, - (void *)bpage->vaddr, bpage->datacount); - if (tempvaddr != 0) - pmap_quick_remove_page(tempvaddr); - bpage = STAILQ_NEXT(bpage, links); - } - dmat->bounce_zone->total_bounced++; - - /* - * Wait for the bcopy to complete before any DMA operations. - */ - dsb(sy); - } - if ((op & BUS_DMASYNC_POSTREAD) != 0) { /* * Wait for any DMA operations to complete before the bcopy. */ dsb(sy); + } - while (bpage != NULL) { - tempvaddr = 0; - datavaddr = bpage->datavaddr; - if (datavaddr == 0) { - tempvaddr = - pmap_quick_enter_page(bpage->datapage); - datavaddr = tempvaddr | bpage->dataoffs; + if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " + "performing bounce", __func__, dmat, dmat->common.flags, + op); + + if ((op & BUS_DMASYNC_PREWRITE) != 0) { + while (bpage != NULL) { + tempvaddr = 0; + datavaddr = bpage->datavaddr; + if (datavaddr == 0) { + tempvaddr = pmap_quick_enter_page( + bpage->datapage); + datavaddr = tempvaddr | bpage->dataoffs; + } + + bcopy((void *)datavaddr, + (void *)bpage->vaddr, bpage->datacount); + if (tempvaddr != 0) + pmap_quick_remove_page(tempvaddr); + bpage = STAILQ_NEXT(bpage, links); } + dmat->bounce_zone->total_bounced++; + } - bcopy((void *)bpage->vaddr, - (void *)datavaddr, bpage->datacount); - - if (tempvaddr != 0) - pmap_quick_remove_page(tempvaddr); - bpage = STAILQ_NEXT(bpage, links); + if ((op & BUS_DMASYNC_POSTREAD) != 0) { + while (bpage != NULL) { + tempvaddr = 0; + datavaddr = bpage->datavaddr; + if (datavaddr == 0) { + tempvaddr = pmap_quick_enter_page( + bpage->datapage); + datavaddr = tempvaddr | bpage->dataoffs; + } + + bcopy((void *)bpage->vaddr, + (void *)datavaddr, bpage->datacount); + + if (tempvaddr != 0) + pmap_quick_remove_page(tempvaddr); + bpage = STAILQ_NEXT(bpage, links); + } + dmat->bounce_zone->total_bounced++; } - dmat->bounce_zone->total_bounced++; + } + + if ((op & BUS_DMASYNC_PREWRITE) != 0) { + /* + * Wait for the bcopy to complete before any DMA operations. + */ + dsb(sy); } }