From owner-dev-commits-src-all@freebsd.org Mon Sep 13 16:56:05 2021 Return-Path: Delivered-To: dev-commits-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id DD2F567E49F; Mon, 13 Sep 2021 16:56:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4H7Xg95GfRz3FfM; Mon, 13 Sep 2021 16:56:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 901322C18; Mon, 13 Sep 2021 16:56:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 18DGu5j8018371; Mon, 13 Sep 2021 16:56:05 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 18DGu5mH018370; Mon, 13 Sep 2021 16:56:05 GMT (envelope-from git) Date: Mon, 13 Sep 2021 16:56:05 GMT Message-Id: <202109131656.18DGu5mH018370@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Konstantin Belousov Subject: git: db2ba218d9fe - main - amd64 acpi_wakeup: map 1:1 whole low 4G for the trampoline page table MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kib X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: db2ba218d9fe6a541a4f537a641cce95f952fd98 Auto-Submitted: auto-generated X-BeenThere: dev-commits-src-all@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Commit messages for all branches of the src repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Sep 2021 16:56:06 -0000 The branch main has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=db2ba218d9fe6a541a4f537a641cce95f952fd98 commit db2ba218d9fe6a541a4f537a641cce95f952fd98 Author: Konstantin Belousov AuthorDate: 2021-09-11 18:36:38 +0000 Commit: Konstantin Belousov CommitDate: 2021-09-13 16:52:13 +0000 amd64 acpi_wakeup: map 1:1 whole low 4G for the trampoline page table This is required since kernel text might be physically located anywhere below 4G. PR: 258432 Reported by: Taku YAMAMOTO Reviewed by: markj Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D31916 --- sys/x86/acpica/acpi_wakeup.c | 77 +++++++++++++++++++++++++++----------------- 1 file changed, 48 insertions(+), 29 deletions(-) diff --git a/sys/x86/acpica/acpi_wakeup.c b/sys/x86/acpica/acpi_wakeup.c index 17946ede45d0..68e0892a31e6 100644 --- a/sys/x86/acpica/acpi_wakeup.c +++ b/sys/x86/acpica/acpi_wakeup.c @@ -99,7 +99,7 @@ static void acpi_wakeup_cpus(struct acpi_softc *); #endif #ifdef __amd64__ -#define ACPI_WAKEPAGES 5 +#define ACPI_WAKEPAGES 8 #else #define ACPI_WAKEPAGES 1 #endif @@ -426,8 +426,8 @@ acpi_install_wakeup_handler(struct acpi_softc *sc) static void *wakeaddr; void *wakepages[ACPI_WAKEPAGES]; #ifdef __amd64__ - uint64_t *pt5, *pt4, *pt3, *pt2; - vm_paddr_t pt5pa, pt4pa, pt3pa, pt2pa; + uint64_t *pt5, *pt4, *pt3, *pt2_0, *pt2_1, *pt2_2, *pt2_3; + vm_paddr_t pt5pa, pt4pa, pt3pa, pt2_0pa, pt2_1pa, pt2_2pa, pt2_3pa; int i; #endif @@ -443,15 +443,21 @@ acpi_install_wakeup_handler(struct acpi_softc *sc) #ifdef __amd64__ if (la57) { - pt5 = wakepages[4]; + pt5 = wakepages[7]; pt5pa = vtophys(pt5); } pt4 = wakepages[1]; pt3 = wakepages[2]; - pt2 = wakepages[3]; + pt2_0 = wakepages[3]; + pt2_1 = wakepages[4]; + pt2_2 = wakepages[5]; + pt2_3 = wakepages[6]; pt4pa = vtophys(pt4); pt3pa = vtophys(pt3); - pt2pa = vtophys(pt2); + pt2_0pa = vtophys(pt2_0); + pt2_1pa = vtophys(pt2_1); + pt2_2pa = vtophys(pt2_2); + pt2_3pa = vtophys(pt2_3); #endif bcopy(wakecode, (void *)sc->acpi_wakeaddr, sizeof(wakecode)); @@ -473,31 +479,44 @@ acpi_install_wakeup_handler(struct acpi_softc *sc) #ifndef __amd64__ WAKECODE_FIXUP(wakeup_cr3, register_t, pmap_get_kcr3()); #else /* __amd64__ */ - /* Create the initial 1GB replicated page tables */ - for (i = 0; i < NPTEPG; i++) { - if (la57) { - pt5[i] = (uint64_t)pt4pa; - pt5[i] |= PG_V | PG_RW | PG_U; - } - - /* - * Each slot of the level 4 pages points - * to the same level 3 page - */ - pt4[i] = (uint64_t)pt3pa; - pt4[i] |= PG_V | PG_RW | PG_U; - - /* - * Each slot of the level 3 pages points - * to the same level 2 page - */ - pt3[i] = (uint64_t)pt2pa; - pt3[i] |= PG_V | PG_RW | PG_U; + /* Create 1:1 mapping for the low 4G */ + if (la57) { + bcopy(kernel_pmap->pm_pmltop, pt5, PAGE_SIZE); + pt5[0] = (uint64_t)pt4pa; + pt5[0] |= PG_V | PG_RW | PG_U; + } else { + bcopy(kernel_pmap->pm_pmltop, pt4, PAGE_SIZE); + } - /* The level 2 page slots are mapped with 2MB pages for 1GB. */ - pt2[i] = i * NBPDR; - pt2[i] |= PG_V | PG_RW | PG_PS | PG_U; + pt4[0] = (uint64_t)pt3pa; + pt4[0] |= PG_V | PG_RW | PG_U; + + pt3[0] = (uint64_t)pt2_0pa; + pt3[0] |= PG_V | PG_RW | PG_U; + pt3[1] = (uint64_t)pt2_1pa; + pt3[1] |= PG_V | PG_RW | PG_U; + pt3[2] = (uint64_t)pt2_2pa; + pt3[2] |= PG_V | PG_RW | PG_U; + pt3[3] = (uint64_t)pt2_3pa; + pt3[3] |= PG_V | PG_RW | PG_U; + + for (i = 0; i < NPDEPG; i++) { + pt2_0[i] = (pd_entry_t)i * NBPDR; + pt2_0[i] |= PG_V | PG_RW | PG_PS | PG_U; + } + for (i = 0; i < NPDEPG; i++) { + pt2_1[i] = (pd_entry_t)NBPDP + i * NBPDR; + pt2_1[i] |= PG_V | PG_RW | PG_PS | PG_U; } + for (i = 0; i < NPDEPG; i++) { + pt2_2[i] = (pd_entry_t)2 * NBPDP + i * NBPDR; + pt2_2[i] |= PG_V | PG_RW | PG_PS | PG_U; + } + for (i = 0; i < NPDEPG; i++) { + pt2_3[i] = (pd_entry_t)3 * NBPDP + i * NBPDR; + pt2_3[i] |= PG_V | PG_RW | PG_PS | PG_U; + } + #endif /* !__amd64__ */ if (bootverbose)