Date: Sun, 4 Jun 2006 21:48:57 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 98506 for review Message-ID: <200606042148.k54Lmvdl065219@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=98506 Change 98506 by marcel@marcel_nfs on 2006/06/04 21:48:32 IFC @98499 Affected files ... .. //depot/projects/uart/arm/include/cpuconf.h#6 integrate .. //depot/projects/uart/compat/linprocfs/linprocfs.c#17 integrate .. //depot/projects/uart/conf/NOTES#39 integrate .. //depot/projects/uart/dev/acpica/acpi_hpet.c#2 integrate .. //depot/projects/uart/dev/ath/if_ath.c#30 integrate .. //depot/projects/uart/dev/awi/awi.c#7 integrate .. //depot/projects/uart/dev/dc/dcphy.c#2 integrate .. //depot/projects/uart/dev/dc/if_dc.c#6 integrate .. //depot/projects/uart/dev/dc/if_dcreg.h#3 integrate .. //depot/projects/uart/dev/gem/if_gem.c#8 integrate .. //depot/projects/uart/dev/ipw/if_ipw.c#6 integrate .. //depot/projects/uart/dev/isp/isp_freebsd.h#12 integrate .. //depot/projects/uart/dev/iwi/if_iwi.c#10 integrate .. //depot/projects/uart/dev/lmc/if_lmc.h#2 integrate .. //depot/projects/uart/dev/mpt/mpt.c#17 integrate .. //depot/projects/uart/dev/mpt/mpt.h#14 integrate .. //depot/projects/uart/dev/mpt/mpt_cam.c#15 integrate .. //depot/projects/uart/dev/mpt/mpt_pci.c#19 integrate .. //depot/projects/uart/dev/pccbb/pccbb.c#20 integrate .. //depot/projects/uart/dev/pccbb/pccbb_isa.c#5 integrate .. //depot/projects/uart/dev/pccbb/pccbb_pci.c#10 integrate .. //depot/projects/uart/dev/pccbb/pccbbvar.h#8 integrate .. //depot/projects/uart/dev/ral/rt2560.c#4 integrate .. //depot/projects/uart/dev/ral/rt2661.c#5 integrate .. //depot/projects/uart/dev/safe/safe.c#9 integrate .. //depot/projects/uart/dev/ubsec/ubsec.c#12 integrate .. //depot/projects/uart/dev/usb/if_axe.c#13 integrate .. //depot/projects/uart/dev/usb/if_axereg.h#7 integrate .. //depot/projects/uart/dev/usb/if_ural.c#8 integrate .. //depot/projects/uart/dev/usb/ugen.c#12 integrate .. //depot/projects/uart/dev/wi/if_wi.c#16 integrate .. //depot/projects/uart/geom/geom_gpt.c#7 integrate .. //depot/projects/uart/ia64/conf/NOTES#7 integrate .. //depot/projects/uart/kern/kern_event.c#13 integrate .. //depot/projects/uart/kern/kern_mutex.c#14 integrate .. //depot/projects/uart/kern/kern_synch.c#16 integrate .. //depot/projects/uart/kern/vfs_aio.c#16 integrate .. //depot/projects/uart/kern/vfs_mount.c#25 integrate .. //depot/projects/uart/net/bpf.c#14 integrate .. //depot/projects/uart/net/bpf.h#6 integrate .. //depot/projects/uart/net/bpfdesc.h#7 integrate .. //depot/projects/uart/net/if_disc.c#8 integrate .. //depot/projects/uart/net/if_faith.c#8 integrate .. //depot/projects/uart/net/if_fwsubr.c#8 integrate .. //depot/projects/uart/net/if_gif.c#8 integrate .. //depot/projects/uart/net/if_gre.c#9 integrate .. //depot/projects/uart/net/if_loop.c#9 integrate .. //depot/projects/uart/net/if_media.h#10 integrate .. //depot/projects/uart/net/if_sl.c#7 integrate .. //depot/projects/uart/net/if_stf.c#9 integrate .. //depot/projects/uart/net/if_tun.c#8 integrate .. //depot/projects/uart/net/raw_cb.c#6 integrate .. //depot/projects/uart/net/raw_usrreq.c#8 integrate .. //depot/projects/uart/net80211/ieee80211_input.c#17 integrate .. //depot/projects/uart/netgraph/atm/uni/ng_uni_cust.h#4 integrate .. //depot/projects/uart/netgraph/ng_base.c#12 integrate .. //depot/projects/uart/netgraph/ng_iface.c#10 integrate .. //depot/projects/uart/netinet/in_pcb.c#18 integrate .. //depot/projects/uart/netinet/ip_carp.c#6 integrate .. //depot/projects/uart/netinet/ip_gre.c#7 integrate .. //depot/projects/uart/netinet/tcp_timer.c#14 integrate .. //depot/projects/uart/netinet/tcp_usrreq.c#14 integrate .. //depot/projects/uart/netinet/udp_usrreq.c#19 integrate .. //depot/projects/uart/netipsec/ipsec.c#12 integrate .. //depot/projects/uart/netipsec/ipsec_input.c#7 integrate .. //depot/projects/uart/opencrypto/cryptodev.h#6 integrate .. //depot/projects/uart/opencrypto/cryptosoft.c#8 integrate .. //depot/projects/uart/opencrypto/xform.c#6 integrate .. //depot/projects/uart/sys/mutex.h#12 integrate .. //depot/projects/uart/ufs/ffs/ffs_vfsops.c#25 integrate Differences ... ==== //depot/projects/uart/arm/include/cpuconf.h#6 (text+ko) ==== @@ -34,7 +34,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.6 2006/05/31 13:06:08 cognet Exp $ + * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.7 2006/06/02 09:39:06 cognet Exp $ * */ @@ -72,7 +72,7 @@ #endif #define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5) -#if ARM_NARCH == 0 && !defined(KLD_MODULE) +#if ARM_NARCH == 0 && !defined(KLD_MODULE) && defined(_KERNEL) #error ARM_NARCH is 0 #endif @@ -120,7 +120,7 @@ #define ARM_NMMUS (ARM_MMU_MEMC + ARM_MMU_GENERIC + \ ARM_MMU_SA1 + ARM_MMU_XSCALE) -#if ARM_NMMUS == 0 && !defined(KLD_MODULE) +#if ARM_NMMUS == 0 && !defined(KLD_MODULE) && defined(_KERNEL) #error ARM_NMMUS is 0 #endif ==== //depot/projects/uart/compat/linprocfs/linprocfs.c#17 (text+ko) ==== @@ -40,7 +40,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/compat/linprocfs/linprocfs.c,v 1.93 2006/05/12 05:04:40 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/compat/linprocfs/linprocfs.c,v 1.94 2006/06/02 13:01:25 des Exp $"); #include <sys/param.h> #include <sys/queue.h> @@ -222,9 +222,9 @@ default: class = 0; break; -#else +#else /* __amd64__ */ default: - class = 6; + class = 15; break; #endif } ==== //depot/projects/uart/conf/NOTES#39 (text+ko) ==== @@ -1,4 +1,4 @@ -# $FreeBSD: src/sys/conf/NOTES,v 1.1364 2006/05/15 20:03:10 marius Exp $ +# $FreeBSD: src/sys/conf/NOTES,v 1.1365 2006/06/03 23:30:16 kris Exp $ # # NOTES -- Lines that can be cut/pasted into kernel and hints configs. # @@ -352,16 +352,18 @@ options KTRACE_REQUEST_POOL=101 # -# KTR is a kernel tracing mechanism imported from BSD/OS. Currently it -# has no userland interface aside from a few sysctl's. It is enabled with -# the KTR option. KTR_ENTRIES defines the number of entries in the circular -# trace buffer. KTR_COMPILE defines the mask of events to compile into the -# kernel as defined by the KTR_* constants in <sys/ktr.h>. KTR_MASK defines the -# initial value of the ktr_mask variable which determines at runtime what -# events to trace. KTR_CPUMASK determines which CPU's log events, with -# bit X corresponding to cpu X. KTR_VERBOSE enables dumping of KTR events -# to the console by default. This functionality can be toggled via the -# debug.ktr_verbose sysctl and defaults to off if KTR_VERBOSE is not defined. +# KTR is a kernel tracing mechanism imported from BSD/OS. Currently +# it has no userland interface aside from a few sysctl's. It is +# enabled with the KTR option. KTR_ENTRIES defines the number of +# entries in the circular trace buffer; it must be a power of two. +# KTR_COMPILE defines the mask of events to compile into the kernel as +# defined by the KTR_* constants in <sys/ktr.h>. KTR_MASK defines the +# initial value of the ktr_mask variable which determines at runtime +# what events to trace. KTR_CPUMASK determines which CPU's log +# events, with bit X corresponding to cpu X. KTR_VERBOSE enables +# dumping of KTR events to the console by default. This functionality +# can be toggled via the debug.ktr_verbose sysctl and defaults to off +# if KTR_VERBOSE is not defined. # options KTR options KTR_ENTRIES=1024 ==== //depot/projects/uart/dev/acpica/acpi_hpet.c#2 (text+ko) ==== @@ -25,18 +25,18 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_hpet.c,v 1.3 2005/11/01 20:41:43 scottl Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_hpet.c,v 1.4 2006/06/04 08:04:19 njl Exp $"); #include "opt_acpi.h" #include <sys/param.h> +#include <sys/bus.h> #include <sys/kernel.h> #include <sys/module.h> #include <sys/rman.h> #include <sys/time.h> #include <sys/timetc.h> -#include <sys/bus.h> + #include <contrib/dev/acpica/acpi.h> -#include "acpi_if.h" #include <dev/acpica/acpivar.h> ACPI_SERIAL_DECL(hpet, "ACPI HPET support"); @@ -47,11 +47,20 @@ struct acpi_hpet_softc { device_t dev; - struct resource *res[1]; + struct resource *mem_res; ACPI_HANDLE handle; }; -static unsigned hpet_get_timecount(struct timecounter *tc); +static u_int hpet_get_timecount(struct timecounter *tc); +static void acpi_hpet_test(struct acpi_hpet_softc *sc); + +static char *hpet_ids[] = { "PNP0103", NULL }; + +#define HPET_MEM_WIDTH 0x400 /* Expected memory region size */ +#define HPET_OFFSET_INFO 0 /* Location of info in region */ +#define HPET_OFFSET_PERIOD 4 /* Location of period (1/hz) */ +#define HPET_OFFSET_ENABLE 0x10 /* Location of enable word */ +#define HPET_OFFSET_VALUE 0xf0 /* Location of actual timer value */ struct timecounter hpet_timecounter = { .tc_get_timecount = hpet_get_timecount, @@ -60,40 +69,36 @@ .tc_quality = -200, }; -static char *hpet_ids[] = { "PNP0103", NULL }; - -static unsigned +static u_int hpet_get_timecount(struct timecounter *tc) { struct acpi_hpet_softc *sc; sc = tc->tc_priv; - return (bus_read_4(sc->res[0], 0xf0)); + return (bus_read_4(sc->mem_res, HPET_OFFSET_VALUE)); } static int acpi_hpet_probe(device_t dev) { + ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__); + if (acpi_disabled("hpet") || ACPI_ID_PROBE(device_get_parent(dev), dev, hpet_ids) == NULL || device_get_unit(dev) != 0) return (ENXIO); - device_set_desc(dev, "HPET - High Precision Event Timers"); + device_set_desc(dev, "High Precision Event Timer"); return (0); } -static struct resource_spec hpet_res_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE}, - { -1, 0, 0} -}; - static int acpi_hpet_attach(device_t dev) { - struct acpi_hpet_softc *sc; - int error; - uint32_t u; + struct acpi_hpet_softc *sc; + int rid; + uint32_t val; + uintmax_t freq; ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__); @@ -101,27 +106,58 @@ sc->dev = dev; sc->handle = acpi_get_handle(dev); - error = bus_alloc_resources(dev, hpet_res_spec, sc->res); - if (error) - return (error); + rid = 0; + sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + RF_ACTIVE); + if (sc->mem_res == NULL) + return (ENOMEM); + + /* Validate that we can access the whole region. */ + if (rman_get_size(sc->mem_res) < HPET_MEM_WIDTH) { + device_printf(dev, "memory region width %ld too small\n", + rman_get_size(sc->mem_res)); + bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res); + return (ENXIO); + } + + /* Read basic statistics about the timer. */ + val = bus_read_4(sc->mem_res, HPET_OFFSET_PERIOD); + freq = (1000000000000000LL + val / 2) / val; + if (bootverbose) { + val = bus_read_4(sc->mem_res, HPET_OFFSET_INFO); + device_printf(dev, + "vend: 0x%x rev: 0x%x num: %d hz: %jd opts:%s%s\n", + val >> 16, val & 0xff, (val >> 18) & 0xf, freq, + ((val >> 15) & 1) ? " leg_route" : "", + ((val >> 13) & 1) ? " count_size" : ""); + } + + /* Be sure it is enabled. */ + bus_write_4(sc->mem_res, HPET_OFFSET_ENABLE, 1); + + if (testenv("debug.acpi.hpet_test")) + acpi_hpet_test(sc); - u = bus_read_4(sc->res[0], 0x0); - device_printf(dev, "Vendor: 0x%x\n", u >> 16); - device_printf(dev, "Leg_Route_Cap: %d\n", (u >> 15) & 1); - device_printf(dev, "Count_Size_Cap: %d\n", (u >> 13) & 1); - device_printf(dev, "Num_Tim_Cap: %d\n", (u >> 18) & 0xf); - device_printf(dev, "Rev_id: 0x%x\n", u & 0xff); + hpet_timecounter.tc_frequency = freq; + hpet_timecounter.tc_priv = sc; + tc_init(&hpet_timecounter); - u = bus_read_4(sc->res[0], 0x4); - device_printf(dev, "Period: %d fs (%jd Hz)\n", - u, (intmax_t)((1000000000000000LL + u / 2) / u)); + return (0); +} - hpet_timecounter.tc_frequency = (1000000000000000LL + u / 2) / u; +static int +acpi_hpet_detach(device_t dev) +{ + ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__); - bus_write_4(sc->res[0], 0x10, 1); + /* XXX Without a tc_remove() function, we can't detach. */ + return (EBUSY); +} -#if 0 - { +/* Print some basic latency/rate information to assist in debugging. */ +static void +acpi_hpet_test(struct acpi_hpet_softc *sc) +{ int i; uint32_t u1, u2; struct bintime b0, b1, b2; @@ -130,47 +166,21 @@ binuptime(&b0); binuptime(&b0); binuptime(&b1); - u1 = bus_read_4(sc->res[0], 0xf0); + u1 = bus_read_4(sc->mem_res, HPET_OFFSET_VALUE); for (i = 1; i < 1000; i++) - u2 = bus_read_4(sc->res[0], 0xf0); + u2 = bus_read_4(sc->mem_res, HPET_OFFSET_VALUE); binuptime(&b2); - u2 = bus_read_4(sc->res[0], 0xf0); + u2 = bus_read_4(sc->mem_res, HPET_OFFSET_VALUE); bintime_sub(&b2, &b1); bintime_sub(&b1, &b0); bintime_sub(&b2, &b1); bintime2timespec(&b2, &ts); - device_printf(dev, "%ld.%09ld: %u ... %u = %u\n", + device_printf(sc->dev, "%ld.%09ld: %u ... %u = %u\n", (long)ts.tv_sec, ts.tv_nsec, u1, u2, u2 - u1); - device_printf(dev, "time per call: %ld ns\n", ts.tv_nsec / 1000); - } -#endif - - device_printf(sc->dev, "HPET attach\n"); - - hpet_timecounter.tc_priv = sc; - - tc_init(&hpet_timecounter); - - return (0); -} - -static int -acpi_hpet_detach(device_t dev) -{ - ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__); - -#if 1 - return (EBUSY); -#else - struct acpi_hpet_softc *sc = device_get_softc(dev); - bus_release_resources(dev, hpet_res_spec, sc->res); - - device_printf(sc->dev, "HPET detach\n"); - return (0); -#endif + device_printf(sc->dev, "time per call: %ld ns\n", ts.tv_nsec / 1000); } static device_method_t acpi_hpet_methods[] = { ==== //depot/projects/uart/dev/ath/if_ath.c#30 (text+ko) ==== @@ -35,7 +35,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.144 2006/05/08 20:11:09 sam Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.146 2006/06/02 23:14:38 sam Exp $"); /* * Driver for the Atheros Wireless LAN controller. @@ -2905,7 +2905,7 @@ * pass decrypt+mic errors but others may be * interesting (e.g. crc). */ - if (sc->sc_drvbpf != NULL && + if (bpf_peers_present(sc->sc_drvbpf) && (ds->ds_rxstat.rs_status & sc->sc_monpass)) { bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_POSTREAD); @@ -2936,7 +2936,8 @@ sc->sc_stats.ast_ant_rx[ds->ds_rxstat.rs_antenna]++; - if (sc->sc_drvbpf != NULL && !ath_rx_tap(sc, m, ds, tsf, nf)) { + if (bpf_peers_present(sc->sc_drvbpf) && + !ath_rx_tap(sc, m, ds, tsf, nf)) { m_freem(m); /* XXX reclaim */ goto rx_next; } @@ -3634,9 +3635,9 @@ ieee80211_dump_pkt(mtod(m0, caddr_t), m0->m_len, sc->sc_hwmap[txrate].ieeerate, -1); - if (ic->ic_rawbpf) + if (bpf_peers_present(ic->ic_rawbpf)) bpf_mtap(ic->ic_rawbpf, m0); - if (sc->sc_drvbpf) { + if (bpf_peers_present(sc->sc_drvbpf)) { u_int64_t tsf = ath_hal_gettsf64(ah); sc->sc_tx_th.wt_tsf = htole64(tsf); ==== //depot/projects/uart/dev/awi/awi.c#7 (text+ko) ==== @@ -89,7 +89,7 @@ __KERNEL_RCSID(0, "$NetBSD: awi.c,v 1.62 2004/01/16 14:13:15 onoe Exp $"); #endif #ifdef __FreeBSD__ -__FBSDID("$FreeBSD: src/sys/dev/awi/awi.c,v 1.42 2005/08/13 00:30:26 sam Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/awi/awi.c,v 1.43 2006/06/02 23:14:39 sam Exp $"); #endif #include "opt_inet.h" @@ -796,8 +796,7 @@ } IFQ_DEQUEUE(&ifp->if_snd, m0); #if NBPFILTER > 0 - if (ifp->if_bpf) - bpf_mtap(ifp->if_bpf, m0); + BPF_MTAP(ifp, m0); #endif if ((ifp->if_flags & IFF_LINK0) || sc->sc_adhoc_ap) m0 = awi_ether_encap(sc, m0); @@ -839,7 +838,7 @@ ifp->if_opackets++; } #if NBPFILTER > 0 - if (ic->ic_rawbpf) + if (bpf_peers_present(ic->ic_rawbpf)) bpf_mtap(ic->ic_rawbpf, m0); #endif if (dowep) { ==== //depot/projects/uart/dev/dc/dcphy.c#2 (text+ko) ==== @@ -31,7 +31,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/dev/dc/dcphy.c,v 1.30 2005/10/18 06:09:42 imp Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/dc/dcphy.c,v 1.31 2006/06/03 20:37:56 jhb Exp $"); /* * Pseudo-driver for internal NWAY support on DEC 21143 and workalike @@ -141,6 +141,7 @@ struct mii_attach_args *ma; struct mii_data *mii; struct dc_softc *dc_sc; + device_t brdev; sc = device_get_softc(dev); ma = device_get_ivars(dev); @@ -166,8 +167,8 @@ CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); - switch(pci_read_config(device_get_parent(sc->mii_dev), - DC_PCI_CSID, 4)) { + brdev = device_get_parent(sc->mii_dev); + switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) { case COMPAQ_PRESARIO_ID: /* Example of how to only allow 10Mbps modes. */ sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; ==== //depot/projects/uart/dev/dc/if_dc.c#6 (text+ko) ==== @@ -31,7 +31,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/dev/dc/if_dc.c,v 1.181 2006/05/12 05:04:41 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/dc/if_dc.c,v 1.182 2006/06/03 20:41:55 jhb Exp $"); /* * DEC "tulip" clone ethernet driver. Supports the DEC/Intel 21143 @@ -150,78 +150,76 @@ * Various supported device vendors/types and their names. */ static struct dc_type dc_devs[] = { - { DC_VENDORID_DEC, DC_DEVICEID_21143, + { DC_DEVID(DC_VENDORID_DEC, DC_DEVICEID_21143), 0, "Intel 21143 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009), 0, "Davicom DM9009 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100), 0, "Davicom DM9100 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102), DC_REVISION_DM9102A, + "Davicom DM9102A 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102), 0, "Davicom DM9102 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, - "Davicom DM9102A 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AL981, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981), 0, "ADMtek AL981 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AN985, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985), 0, "ADMtek AN985 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511), 0, "ADMtek ADM9511 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513), 0, "ADMtek ADM9513 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_FA511, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511), 0, "Netgear FA511 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, + { DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), DC_REVISION_88141, + "ASIX AX88141 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), 0, "ASIX AX88140A 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, - "ASIX AX88141 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713), DC_REVISION_98713A, + "Macronix 98713A 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713), 0, "Macronix 98713 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, - "Macronix 98713A 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, + { DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP), DC_REVISION_98713A, "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, + { DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP), 0, "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), DC_REVISION_98725, + "Macronix 98725 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), DC_REVISION_98715AEC_C, + "Macronix 98715AEC-C 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), 0, "Macronix 98715/98715A 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98715AEC-C 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98725 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98727, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98727), 0, "Macronix 98727/98732 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C115, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C115), 0, "LC82C115 PNIC II 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168), DC_REVISION_82C169, + "82c169 PNIC 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168), 0, "82c168 PNIC 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, - "82c169 PNIC 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN1217, + { DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN1217), 0, "Accton EN1217 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN2242, + { DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242), 0, "Accton EN2242 MiniPCI 10/100BaseTX" }, - { DC_VENDORID_XIRCOM, DC_DEVICEID_X3201, + { DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201), 0, "Xircom X3201 10/100BaseTX" }, - { DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD, + { DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD), 0, "Neteasy DRP-32TXD Cardbus 10/100" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500, + { DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500), 0, "Abocom FE2500 10/100BaseTX" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX, + { DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX), 0, "Abocom FE2500MX 10/100BaseTX" }, - { DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112, + { DC_DEVID(DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112), 0, "Conexant LANfinity MiniPCI 10/100BaseTX" }, - { DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX, + { DC_DEVID(DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX), 0, "Hawking CB102 CardBus 10/100" }, - { DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T, + { DC_DEVID(DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T), 0, "PlaneX FNW-3602-T CardBus 10/100" }, - { DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB, + { DC_DEVID(DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB), 0, "3Com OfficeConnect 10/100B" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120, + { DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120), 0, "Microsoft MN-120 CardBus 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130, + { DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130), 0, "Microsoft MN-130 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130_FAKE, - "Microsoft MN-130 10/100" }, { 0, 0, NULL } }; @@ -1003,7 +1001,7 @@ struct ifmedia *ifm; int rev; - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; + rev = pci_get_revid(dev); sc = device_get_softc(dev); mii = device_get_softc(sc->dc_miibus); @@ -1560,50 +1558,16 @@ dc_devtype(device_t dev) { struct dc_type *t; - u_int32_t rev; + u_int32_t devid; + u_int8_t rev; t = dc_devs; + devid = pci_get_devid(dev); + rev = pci_get_revid(dev); while (t->dc_name != NULL) { - if ((pci_get_vendor(dev) == t->dc_vid) && - (pci_get_device(dev) == t->dc_did)) { - /* Check the PCI revision */ - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; - if (t->dc_did == DC_DEVICEID_98713 && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_98713_CP && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98715AEC_C) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98725) - t++; - if (t->dc_did == DC_DEVICEID_AX88140A && - rev >= DC_REVISION_88141) - t++; - if (t->dc_did == DC_DEVICEID_82C168 && - rev >= DC_REVISION_82C169) - t++; - if (t->dc_did == DC_DEVICEID_DM9102 && - rev >= DC_REVISION_DM9102A) - t++; - /* - * The Microsoft MN-130 has a device ID of 0x0002, - * which happens to be the same as the PNIC 82c168. - * To keep dc_attach() from getting confused, we - * pretend its ID is something different. - * XXX: ideally, dc_attach() should be checking - * vendorid+deviceid together to avoid such - * collisions. - */ - if (t->dc_vid == DC_VENDORID_MICROSOFT && - t->dc_did == DC_DEVICEID_MSMN130) - t++; + if (devid == t->dc_devid && rev >= t->dc_minrev) return (t); - } t++; } @@ -1881,53 +1845,55 @@ /* Need this info to decide on a chip type. */ sc->dc_info = dc_devtype(dev); - revision = pci_read_config(dev, DC_PCI_CFRV, 4) & 0x000000FF; + revision = pci_get_revid(dev); /* Get the eeprom width, but PNIC and XIRCOM have diff eeprom */ - if (sc->dc_info->dc_did != DC_DEVICEID_82C168 && - sc->dc_info->dc_did != DC_DEVICEID_X3201) + if (sc->dc_info->dc_devid != + DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168) && + sc->dc_info->dc_devid != + DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201)) dc_eeprom_width(sc); - switch (sc->dc_info->dc_did) { - case DC_DEVICEID_21143: + switch (sc->dc_info->dc_devid) { + case DC_DEVID(DC_VENDORID_DEC, DC_DEVICEID_21143): sc->dc_type = DC_TYPE_21143; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL; /* Save EEPROM contents so we can parse them later. */ dc_read_srom(sc, sc->dc_romwidth); break; - case DC_DEVICEID_DM9009: - case DC_DEVICEID_DM9100: - case DC_DEVICEID_DM9102: + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009): + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100): + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102): sc->dc_type = DC_TYPE_DM9102; sc->dc_flags |= DC_TX_COALESCE | DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_TX_STORENFWD; sc->dc_flags |= DC_TX_ALIGN; sc->dc_pmode = DC_PMODE_MII; + /* Increase the latency timer value. */ - command = pci_read_config(dev, DC_PCI_CFLT, 4); - command &= 0xFFFF00FF; - command |= 0x00008000; - pci_write_config(dev, DC_PCI_CFLT, command, 4); + pci_write_config(dev, PCIR_LATTIMER, 0x80, 1); break; - case DC_DEVICEID_AL981: + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981): sc->dc_type = DC_TYPE_AL981; sc->dc_flags |= DC_TX_USE_TX_INTR; sc->dc_flags |= DC_TX_ADMTEK_WAR; sc->dc_pmode = DC_PMODE_MII; dc_read_srom(sc, sc->dc_romwidth); break; - case DC_DEVICEID_AN985: - case DC_DEVICEID_ADM9511: - case DC_DEVICEID_ADM9513: - case DC_DEVICEID_DRP32TXD: - case DC_DEVICEID_FA511: - case DC_DEVICEID_FE2500: - case DC_DEVICEID_EN2242: - case DC_DEVICEID_HAWKING_PN672TX: - case DC_DEVICEID_3CSOHOB: - case DC_DEVICEID_MSMN120: - case DC_DEVICEID_MSMN130_FAKE: /* XXX avoid collision with PNIC*/ + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513): + case DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511): + case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500): + case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX): + case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242): + case DC_DEVID(DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX): + case DC_DEVID(DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T): + case DC_DEVID(DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB): + case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120): + case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130): sc->dc_type = DC_TYPE_AN985; sc->dc_flags |= DC_64BIT_HASH; sc->dc_flags |= DC_TX_USE_TX_INTR; @@ -1935,8 +1901,8 @@ sc->dc_pmode = DC_PMODE_MII; /* Don't read SROM for - auto-loaded on reset */ break; - case DC_DEVICEID_98713: - case DC_DEVICEID_98713_CP: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713): + case DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP): if (revision < DC_REVISION_98713A) { sc->dc_type = DC_TYPE_98713; } @@ -1947,8 +1913,8 @@ sc->dc_flags |= DC_REDUCED_MII_POLL; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; break; - case DC_DEVICEID_987x5: - case DC_DEVICEID_EN1217: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5): + case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN1217): /* * Macronix MX98715AEC-C/D/E parts have only a * 128-bit hash table. We need to deal with these @@ -1963,17 +1929,17 @@ sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_98727: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98727): sc->dc_type = DC_TYPE_987x5; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_82C115: + case DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C115): sc->dc_type = DC_TYPE_PNICII; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR | DC_128BIT_HASH; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_82C168: + case DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168): sc->dc_type = DC_TYPE_PNIC; sc->dc_flags |= DC_TX_STORENFWD | DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_PNIC_RX_BUG_WAR; @@ -1981,13 +1947,13 @@ if (revision < DC_REVISION_82C169) sc->dc_pmode = DC_PMODE_SYM; break; - case DC_DEVICEID_AX88140A: + case DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A): sc->dc_type = DC_TYPE_ASIX; sc->dc_flags |= DC_TX_USE_TX_INTR | DC_TX_INTR_FIRSTFRAG; sc->dc_flags |= DC_REDUCED_MII_POLL; sc->dc_pmode = DC_PMODE_MII; break; - case DC_DEVICEID_X3201: + case DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201): sc->dc_type = DC_TYPE_XIRCOM; sc->dc_flags |= DC_TX_INTR_ALWAYS | DC_TX_COALESCE | DC_TX_ALIGN; @@ -1998,7 +1964,7 @@ */ sc->dc_pmode = DC_PMODE_MII; break; - case DC_DEVICEID_RS7112: + case DC_DEVID(DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112): sc->dc_type = DC_TYPE_CONEXANT; sc->dc_flags |= DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_REDUCED_MII_POLL; @@ -2006,7 +1972,8 @@ dc_read_srom(sc, sc->dc_romwidth); break; default: - device_printf(dev, "unknown device: %x\n", sc->dc_info->dc_did); + device_printf(dev, "unknown device: %x\n", + sc->dc_info->dc_devid); break; } @@ -2014,8 +1981,7 @@ if (DC_IS_DAVICOM(sc)) sc->dc_cachesize = 0; else - sc->dc_cachesize = pci_read_config(dev, - DC_PCI_CFLT, 4) & 0xFF; + sc->dc_cachesize = pci_get_cachelnsz(dev); /* Reset the adapter. */ dc_reset(sc); @@ -2249,7 +2215,8 @@ * LEDs, and twiddling these bits has adverse effects * on them. (I.e. you suddenly can't get a link.) */ - if (pci_read_config(dev, DC_PCI_CSID, 4) != 0x80281033) + if (!(pci_get_subvendor(dev) == 0x1033 && + pci_get_subdevice(dev) == 0x8028)) sc->dc_flags |= DC_TULIP_LEDS; error = 0; } ==== //depot/projects/uart/dev/dc/if_dcreg.h#3 (text+ko) ==== @@ -29,7 +29,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/dev/dc/if_dcreg.h,v 1.48 2006/03/16 20:00:39 jhb Exp $ + * $FreeBSD: src/sys/dev/dc/if_dcreg.h,v 1.49 2006/06/03 20:41:55 jhb Exp $ */ /* @@ -512,8 +512,8 @@ struct dc_type { - u_int16_t dc_vid; - u_int16_t dc_did; + u_int32_t dc_devid; + u_int8_t dc_minrev; char *dc_name; }; @@ -1004,58 +1004,22 @@ #define DC_DEVICEID_MSMN120 0x0001 #define DC_DEVICEID_MSMN130 0x0002 -#define DC_DEVICEID_MSMN130_FAKE 0xFFF2 + +#define DC_DEVID(vendor, device) ((device) << 16 | (vendor)) /* * PCI low memory base and low I/O base register, and * other PCI registers. */ -#define DC_PCI_CFID 0x00 /* Id */ -#define DC_PCI_CFCS 0x04 /* Command and status */ -#define DC_PCI_CFRV 0x08 /* Revision */ -#define DC_PCI_CFLT 0x0C /* Latency timer */ -#define DC_PCI_CFBIO 0x10 /* Base I/O address */ -#define DC_PCI_CFBMA 0x14 /* Base memory address */ -#define DC_PCI_CCIS 0x28 /* Card info struct */ -#define DC_PCI_CSID 0x2C /* Subsystem ID */ -#define DC_PCI_CBER 0x30 /* Expansion ROM base address */ -#define DC_PCI_CCAP 0x34 /* Caps pointer - PD/TD chip only */ -#define DC_PCI_CFIT 0x3C /* Interrupt */ +#define DC_PCI_CFBIO PCIR_BAR(0) /* Base I/O address */ +#define DC_PCI_CFBMA PCIR_BAR(1) /* Base memory address */ #define DC_PCI_CFDD 0x40 /* Device and driver area */ #define DC_PCI_CWUA0 0x44 /* Wake-Up LAN addr 0 */ #define DC_PCI_CWUA1 0x48 /* Wake-Up LAN addr 1 */ #define DC_PCI_SOP0 0x4C /* SecureON passwd 0 */ #define DC_PCI_SOP1 0x50 /* SecureON passwd 1 */ #define DC_PCI_CWUC 0x54 /* Configuration Wake-Up cmd */ -#define DC_PCI_CCID 0xDC /* Capability ID - PD/TD only */ -#define DC_PCI_CPMC 0xE0 /* Pwrmgmt ctl & sts - PD/TD only */ - -/* PCI ID register */ -#define DC_CFID_VENDOR 0x0000FFFF -#define DC_CFID_DEVICE 0xFFFF0000 - -/* PCI command/status register */ -#define DC_CFCS_IOSPACE 0x00000001 /* I/O space enable */ -#define DC_CFCS_MEMSPACE 0x00000002 /* memory space enable */ -#define DC_CFCS_BUSMASTER 0x00000004 /* bus master enable */ -#define DC_CFCS_MWI_ENB 0x00000010 /* mem write and inval enable */ -#define DC_CFCS_PARITYERR_ENB 0x00000040 /* parity error enable */ -#define DC_CFCS_SYSERR_ENB 0x00000100 /* system error enable */ -#define DC_CFCS_NEWCAPS 0x00100000 /* new capabilities */ -#define DC_CFCS_FAST_B2B 0x00800000 /* fast back-to-back capable */ -#define DC_CFCS_DATAPARITY 0x01000000 /* Parity error report */ -#define DC_CFCS_DEVSELTIM 0x06000000 /* devsel timing */ -#define DC_CFCS_TGTABRT 0x10000000 /* received target abort */ -#define DC_CFCS_MASTERABRT 0x20000000 /* received master abort */ -#define DC_CFCS_SYSERR 0x40000000 /* asserted system error */ -#define DC_CFCS_PARITYERR 0x80000000 /* asserted parity error */ - -/* PCI revision register */ -#define DC_CFRV_STEPPING 0x0000000F -#define DC_CFRV_REVISION 0x000000F0 -#define DC_CFRV_SUBCLASS 0x00FF0000 -#define DC_CFRV_BASECLASS 0xFF000000 #define DC_21143_PB_REV 0x00000030 #define DC_21143_TB_REV 0x00000030 @@ -1064,48 +1028,6 @@ #define DC_21143_PD_REV 0x00000041 #define DC_21143_TD_REV 0x00000041 -/* PCI latency timer register */ -#define DC_CFLT_CACHELINESIZE 0x000000FF -#define DC_CFLT_LATENCYTIMER 0x0000FF00 - -/* PCI subsystem ID register */ -#define DC_CSID_VENDOR 0x0000FFFF -#define DC_CSID_DEVICE 0xFFFF0000 - -/* PCI cababilities pointer */ -#define DC_CCAP_OFFSET 0x000000FF - -/* PCI interrupt config register */ -#define DC_CFIT_INTLINE 0x000000FF -#define DC_CFIT_INTPIN 0x0000FF00 -#define DC_CFIT_MIN_GNT 0x00FF0000 -#define DC_CFIT_MAX_LAT 0xFF000000 - -/* PCI capability register */ -#define DC_CCID_CAPID 0x000000FF -#define DC_CCID_NEXTPTR 0x0000FF00 -#define DC_CCID_PM_VERS 0x00070000 -#define DC_CCID_PME_CLK 0x00080000 -#define DC_CCID_DVSPEC_INT 0x00200000 -#define DC_CCID_STATE_D1 0x02000000 -#define DC_CCID_STATE_D2 0x04000000 -#define DC_CCID_PME_D0 0x08000000 -#define DC_CCID_PME_D1 0x10000000 -#define DC_CCID_PME_D2 0x20000000 -#define DC_CCID_PME_D3HOT 0x40000000 -#define DC_CCID_PME_D3COLD 0x80000000 - -/* PCI power management control/status register */ -#define DC_CPMC_STATE 0x00000003 -#define DC_CPMC_PME_ENB 0x00000100 >>> TRUNCATED FOR MAIL (1000 lines) <<<
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