From owner-svn-src-head@freebsd.org Sun May 28 12:05:17 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E2DB9D869DC; Sun, 28 May 2017 12:05:17 +0000 (UTC) (envelope-from mizhka@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C0158AC8; Sun, 28 May 2017 12:05:17 +0000 (UTC) (envelope-from mizhka@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v4SC5GOj078567; Sun, 28 May 2017 12:05:16 GMT (envelope-from mizhka@FreeBSD.org) Received: (from mizhka@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v4SC5G9t078564; Sun, 28 May 2017 12:05:16 GMT (envelope-from mizhka@FreeBSD.org) Message-Id: <201705281205.v4SC5G9t078564@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mizhka set sender to mizhka@FreeBSD.org using -f From: Michael Zhilin Date: Sun, 28 May 2017 12:05:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r319069 - in head/sys: dev/bhnd/cores/chipc dev/bhnd/cores/chipc/pwrctl mips/broadcom X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 May 2017 12:05:18 -0000 Author: mizhka Date: Sun May 28 12:05:16 2017 New Revision: 319069 URL: https://svnweb.freebsd.org/changeset/base/319069 Log: [mips] [bhnd] Support of old PMU for BMIPS and siba SoC - Fix typo of PLL Type 4 - Don't panic of frequency getters Submitted by: Hiroki Mori Differential Revision: https://reviews.freebsd.org/D10967 Modified: head/sys/dev/bhnd/cores/chipc/chipcreg.h head/sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c head/sys/mips/broadcom/bcm_pmu.c Modified: head/sys/dev/bhnd/cores/chipc/chipcreg.h ============================================================================== --- head/sys/dev/bhnd/cores/chipc/chipcreg.h Sun May 28 10:46:34 2017 (r319068) +++ head/sys/dev/bhnd/cores/chipc/chipcreg.h Sun May 28 12:05:16 2017 (r319069) @@ -280,7 +280,7 @@ enum { #define CHIPC_PLL_TYPE1 0x2 /* 48MHz base, 3 dividers */ #define CHIPC_PLL_TYPE2 0x4 /* 48MHz, 4 dividers */ #define CHIPC_PLL_TYPE3 0x6 /* 25MHz, 2 dividers */ -#define CHIPC_PLL_TYPE4 0x8 /* 48MHz, 4 dividers */ +#define CHIPC_PLL_TYPE4 0x1 /* 48MHz, 4 dividers */ #define CHIPC_PLL_TYPE5 0x3 /* 25MHz, 4 dividers */ #define CHIPC_PLL_TYPE6 0x5 /* 100/200 or 120/240 only */ #define CHIPC_PLL_TYPE7 0x7 /* 25MHz, 4 dividers */ Modified: head/sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c ============================================================================== --- head/sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c Sun May 28 10:46:34 2017 (r319068) +++ head/sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c Sun May 28 12:05:16 2017 (r319069) @@ -374,7 +374,7 @@ bhnd_pwrctl_slowclk_freq(struct bhnd_pwr } else if (PWRCTL_QUIRK(sc, SLOWCLK_CTL)) { div = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL); div = CHIPC_GET_BITS(div, CHIPC_SCC_CD); - div *= 4; + div = 4 * (div + 1); } else if (PWRCTL_QUIRK(sc, INSTACLK_CTL)) { if (max_freq) { div = 1; @@ -503,7 +503,10 @@ bhnd_pwrctl_setclk(struct bhnd_pwrctl_so if (bhnd_get_hwrev(sc->chipc_dev) == 10) return (ENODEV); - scc = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL); + if (PWRCTL_QUIRK(sc, SLOWCLK_CTL)) + scc = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL); + else + scc = bhnd_bus_read_4(sc->res, CHIPC_SYS_CLK_CTL); switch (clock) { case BHND_CLOCK_HT: @@ -520,7 +523,10 @@ bhnd_pwrctl_setclk(struct bhnd_pwrctl_so return (ENODEV); } - bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc); + if (PWRCTL_QUIRK(sc, SLOWCLK_CTL)) + bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc); + else + bhnd_bus_write_4(sc->res, CHIPC_SYS_CLK_CTL, scc); DELAY(CHIPC_PLL_DELAY); break; Modified: head/sys/mips/broadcom/bcm_pmu.c ============================================================================== --- head/sys/mips/broadcom/bcm_pmu.c Sun May 28 10:46:34 2017 (r319068) +++ head/sys/mips/broadcom/bcm_pmu.c Sun May 28 12:05:16 2017 (r319069) @@ -208,7 +208,7 @@ bcm_get_uart_rclk(struct bcm_platform *b uint64_t bcm_get_alpfreq(struct bcm_platform *bp) { if (!bcm_has_pmu(bp)) - panic("%s requires PMU\n", __FUNCTION__); + return (BHND_PMU_ALP_CLOCK); return (bhnd_pmu_alp_clock(bcm_get_pmu(bp))); } @@ -217,7 +217,7 @@ bcm_get_alpfreq(struct bcm_platform *bp) uint64_t bcm_get_ilpfreq(struct bcm_platform *bp) { if (!bcm_has_pmu(bp)) - panic("%s requires PMU\n", __FUNCTION__); + return (BHND_PMU_ILP_CLOCK); return (bhnd_pmu_ilp_clock(bcm_get_pmu(bp))); }