From owner-svn-src-head@FreeBSD.ORG Mon Jul 12 07:24:41 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EA9DD1065674; Mon, 12 Jul 2010 07:24:40 +0000 (UTC) (envelope-from jchandra@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id DB3ED8FC0C; Mon, 12 Jul 2010 07:24:40 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o6C7Oekl027117; Mon, 12 Jul 2010 07:24:40 GMT (envelope-from jchandra@svn.freebsd.org) Received: (from jchandra@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o6C7OeuT027114; Mon, 12 Jul 2010 07:24:40 GMT (envelope-from jchandra@svn.freebsd.org) Message-Id: <201007120724.o6C7OeuT027114@svn.freebsd.org> From: "Jayachandran C." Date: Mon, 12 Jul 2010 07:24:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r209928 - head/sys/mips/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Jul 2010 07:24:41 -0000 Author: jchandra Date: Mon Jul 12 07:24:40 2010 New Revision: 209928 URL: http://svn.freebsd.org/changeset/base/209928 Log: Move KSEG address definitions from cpu.h to cpuregs.h with the other definitions, add some XKPHYS related definitions for n64. Reviewed by: imp Modified: head/sys/mips/include/cpu.h head/sys/mips/include/cpuregs.h Modified: head/sys/mips/include/cpu.h ============================================================================== --- head/sys/mips/include/cpu.h Mon Jul 12 06:46:17 2010 (r209927) +++ head/sys/mips/include/cpu.h Mon Jul 12 07:24:40 2010 (r209928) @@ -49,23 +49,6 @@ #include -#define MIPS_KSEG0_LARGEST_PHYS (0x20000000) -#define MIPS_PHYS_MASK (0x1fffffff) - -#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START) -#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START) -#define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) -#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) - -#define MIPS_IS_KSEG0_ADDR(x) \ - (((vm_offset_t)(x) >= MIPS_KSEG0_START) && \ - ((vm_offset_t)(x) <= MIPS_KSEG0_END)) -#define MIPS_IS_KSEG1_ADDR(x) \ - (((vm_offset_t)(x) >= MIPS_KSEG1_START) && \ - ((vm_offset_t)(x) <= MIPS_KSEG1_END)) -#define MIPS_IS_VALID_PTR(x) (MIPS_IS_KSEG0_ADDR(x) || \ - MIPS_IS_KSEG1_ADDR(x)) - /* * Status register. */ Modified: head/sys/mips/include/cpuregs.h ============================================================================== --- head/sys/mips/include/cpuregs.h Mon Jul 12 06:46:17 2010 (r209927) +++ head/sys/mips/include/cpuregs.h Mon Jul 12 07:24:40 2010 (r209928) @@ -78,6 +78,9 @@ * Caching of mapped addresses is controlled by bits in the TLB entry. */ +#define MIPS_KSEG0_LARGEST_PHYS (0x20000000) +#define MIPS_PHYS_MASK (0x1fffffff) + #if !defined(_LOCORE) #define MIPS_KUSEG_START 0x00000000 #define MIPS_KSEG0_START ((intptr_t)(int32_t)0x80000000) @@ -91,7 +94,20 @@ #define MIPS_KSEG2_START MIPS_KSSEG_START #define MIPS_KSEG2_END MIPS_KSSEG_END -#endif + +#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START) +#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START) +#define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) +#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) + +#define MIPS_IS_KSEG0_ADDR(x) \ + (((vm_offset_t)(x) >= MIPS_KSEG0_START) && \ + ((vm_offset_t)(x) <= MIPS_KSEG0_END)) +#define MIPS_IS_KSEG1_ADDR(x) \ + (((vm_offset_t)(x) >= MIPS_KSEG1_START) && \ + ((vm_offset_t)(x) <= MIPS_KSEG1_END)) +#define MIPS_IS_VALID_PTR(x) (MIPS_IS_KSEG0_ADDR(x) || \ + MIPS_IS_KSEG1_ADDR(x)) #define MIPS_XKPHYS_START 0x8000000000000000 #define MIPS_XKPHYS_END 0xbfffffffffffffff @@ -101,7 +117,12 @@ #define MIPS_PHYS_TO_XKPHYS(cca,x) \ ((0x2ULL << 62) | ((unsigned long long)(cca) << 59) | (x)) -#define MIPS_XKPHYS_TO_PHYS(x) ((x) & 0x07ffffffffffffffULL) +#define MIPS_PHYS_TO_XKPHYS_CACHED(x) \ + ((0x2ULL << 62) | ((unsigned long long)(MIPS_XKPHYS_CCA_CNC) << 59) | (x)) +#define MIPS_PHYS_TO_XKPHYS_UNCACHED(x) \ + ((0x2ULL << 62) | ((unsigned long long)(MIPS_XKPHYS_CCA_UC) << 59) | (x)) + +#define MIPS_XKPHYS_TO_PHYS(x) ((x) & 0x07ffffffffffffffULL) #define MIPS_XUSEG_START 0x0000000000000000 #define MIPS_XUSEG_END 0x0000010000000000 @@ -109,6 +130,8 @@ #define MIPS_XKSEG_START 0xc000000000000000 #define MIPS_XKSEG_END 0xc00000ff80000000 +#endif + /* CPU dependent mtc0 hazard hook */ #ifdef TARGET_OCTEON #define COP0_SYNC nop; nop; nop; nop; nop;