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Date:      Fri, 6 May 2011 02:45:02 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r221518 - head/sys/mips/atheros
Message-ID:  <201105060245.p462j2mv028994@svn.freebsd.org>

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Author: adrian
Date: Fri May  6 02:45:02 2011
New Revision: 221518
URL: http://svn.freebsd.org/changeset/base/221518

Log:
  Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.
  
  Submitted by:	Luiz Otavio O Souza <loos.br@gmail.com>

Modified:
  head/sys/mips/atheros/ar71xx_gpio.c
  head/sys/mips/atheros/ar71xx_gpiovar.h
  head/sys/mips/atheros/ar724xreg.h
  head/sys/mips/atheros/ar91xxreg.h

Modified: head/sys/mips/atheros/ar71xx_gpio.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_gpio.c	Fri May  6 01:29:14 2011	(r221517)
+++ head/sys/mips/atheros/ar71xx_gpio.c	Fri May  6 02:45:02 2011	(r221518)
@@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/bus.h>
 #include <machine/resource.h>
 #include <mips/atheros/ar71xxreg.h>
+#include <mips/atheros/ar71xx_setup.h>
 #include <mips/atheros/ar71xx_gpiovar.h>
 
 #include "gpio_if.h"
@@ -144,7 +145,19 @@ static int
 ar71xx_gpio_pin_max(device_t dev, int *maxpin)
 {
 
-	*maxpin = AR71XX_GPIO_PINS - 1;
+	switch (ar71xx_soc) {
+		case AR71XX_SOC_AR9130:
+		case AR71XX_SOC_AR9132:
+			*maxpin = AR91XX_GPIO_PINS - 1;
+			break;
+		case AR71XX_SOC_AR7240:
+		case AR71XX_SOC_AR7241:
+		case AR71XX_SOC_AR7242:
+			*maxpin = AR724X_GPIO_PINS - 1;
+			break;
+		default:
+			*maxpin = AR71XX_GPIO_PINS - 1;
+	}
 	return (0);
 }
 

Modified: head/sys/mips/atheros/ar71xx_gpiovar.h
==============================================================================
--- head/sys/mips/atheros/ar71xx_gpiovar.h	Fri May  6 01:29:14 2011	(r221517)
+++ head/sys/mips/atheros/ar71xx_gpiovar.h	Fri May  6 02:45:02 2011	(r221518)
@@ -52,6 +52,8 @@
 	GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits))
 
 #define	AR71XX_GPIO_PINS	12
+#define	AR724X_GPIO_PINS	18
+#define	AR91XX_GPIO_PINS	22
 
 struct ar71xx_gpio_softc {
 	device_t		dev;

Modified: head/sys/mips/atheros/ar724xreg.h
==============================================================================
--- head/sys/mips/atheros/ar724xreg.h	Fri May  6 01:29:14 2011	(r221517)
+++ head/sys/mips/atheros/ar724xreg.h	Fri May  6 02:45:02 2011	(r221518)
@@ -105,6 +105,4 @@
 #define	AR724X_GPIO_FUNC_UART_EN		(1 >> 1)
 #define	AR724X_GPIO_FUNC_JTAG_DISABLE		(1 >> 0)
 
-#define	AR724X_GPIO_COUNT		18
-
 #endif

Modified: head/sys/mips/atheros/ar91xxreg.h
==============================================================================
--- head/sys/mips/atheros/ar91xxreg.h	Fri May  6 01:29:14 2011	(r221517)
+++ head/sys/mips/atheros/ar91xxreg.h	Fri May  6 02:45:02 2011	(r221518)
@@ -81,6 +81,4 @@
 #define	AR91XX_GPIO_FUNC_UART_EN	(1 << 8)
 #define	AR91XX_GPIO_FUNC_USB_CLK_EN	(1 << 4)
 
-#define	AR91XX_GPIO_COUNT		22
-
 #endif



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