From owner-svn-src-all@freebsd.org Fri Jun 26 19:55:12 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id C0E9A35EE11; Fri, 26 Jun 2020 19:55:12 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49tnfm4dd2z3YSW; Fri, 26 Jun 2020 19:55:12 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 962DB18F69; Fri, 26 Jun 2020 19:55:12 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 05QJtC9j086632; Fri, 26 Jun 2020 19:55:12 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 05QJtB8A086629; Fri, 26 Jun 2020 19:55:11 GMT (envelope-from mav@FreeBSD.org) Message-Id: <202006261955.05QJtB8A086629@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Fri, 26 Jun 2020 19:55:11 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r362661 - in head/sys/dev: acpica pci X-SVN-Group: head X-SVN-Commit-Author: mav X-SVN-Commit-Paths: in head/sys/dev: acpica pci X-SVN-Commit-Revision: 362661 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Jun 2020 19:55:12 -0000 Author: mav Date: Fri Jun 26 19:55:11 2020 New Revision: 362661 URL: https://svnweb.freebsd.org/changeset/base/362661 Log: Add mostly dummy hw.pci.enable_aspm tunable. The only thing this tunable enables now is reporting to ACPI _OSC that Active State Power Management and Clock Power Management Capability are "supported" by the OS. I've found that at least some Supermicro server boards do not allow OS to support native PCIe hot-plug unless it reports those capabilities. After spending significant time in PCIe specs I have found very little motivation for that, and none of it applies to those motherboards, not enabling ASPM themselves. So unless OS explicitly wants to save power, I see nothing for it to do there actually. I guess it may get sense to support ASPM when we get Thunderbolt support. Otherwise I have no system with PCIe hot-plug where power saving matters. It would be nice to enable this by default, but I worry that it affect power saving of some laptops, even though I haven't noticed that myself. Modified: head/sys/dev/acpica/acpi_pcib_acpi.c head/sys/dev/pci/pci.c head/sys/dev/pci/pcivar.h Modified: head/sys/dev/acpica/acpi_pcib_acpi.c ============================================================================== --- head/sys/dev/acpica/acpi_pcib_acpi.c Fri Jun 26 19:46:30 2020 (r362660) +++ head/sys/dev/acpica/acpi_pcib_acpi.c Fri Jun 26 19:55:11 2020 (r362661) @@ -326,6 +326,10 @@ acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t os /* Support Field: Extended PCI Config Space, PCI Segment Groups, MSI */ cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF | PCIM_OSC_SUPPORT_SEG_GROUP | PCIM_OSC_SUPPORT_MSI; + /* Active State Power Management, Clock Power Management Capability */ + if (pci_enable_aspm) + cap_set[PCI_OSC_SUPPORT] |= PCIM_OSC_SUPPORT_ASPM | + PCIM_OSC_SUPPORT_CPMC; /* Control Field */ cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl; Modified: head/sys/dev/pci/pci.c ============================================================================== --- head/sys/dev/pci/pci.c Fri Jun 26 19:46:30 2020 (r362660) +++ head/sys/dev/pci/pci.c Fri Jun 26 19:55:11 2020 (r362661) @@ -408,6 +408,10 @@ static int pci_enable_ari = 1; SYSCTL_INT(_hw_pci, OID_AUTO, enable_ari, CTLFLAG_RDTUN, &pci_enable_ari, 0, "Enable support for PCIe Alternative RID Interpretation"); +int pci_enable_aspm; +SYSCTL_INT(_hw_pci, OID_AUTO, enable_aspm, CTLFLAG_RDTUN, &pci_enable_aspm, + 0, "Enable support for PCIe Active State Power Management"); + static int pci_clear_aer_on_attach = 0; SYSCTL_INT(_hw_pci, OID_AUTO, clear_aer_on_attach, CTLFLAG_RWTUN, &pci_clear_aer_on_attach, 0, Modified: head/sys/dev/pci/pcivar.h ============================================================================== --- head/sys/dev/pci/pcivar.h Fri Jun 26 19:46:30 2020 (r362660) +++ head/sys/dev/pci/pcivar.h Fri Jun 26 19:55:11 2020 (r362661) @@ -257,6 +257,7 @@ typedef struct { } pcih2cfgregs; extern uint32_t pci_numdevs; +extern int pci_enable_aspm; /* * The bitfield has to be stable and match the fields below (so that